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/linux-6.12.1/drivers/clk/qcom/
Da7-pll.c22 static struct clk_alpha_pll a7pll = { variable
29 .name = "a7pll",
73 regmap_read(regmap, a7pll.offset + LUCID_PLL_OFF_L_VAL, &l_val); in qcom_a7pll_probe()
75 clk_lucid_pll_configure(&a7pll, regmap, &a7pll_config); in qcom_a7pll_probe()
77 ret = devm_clk_register_regmap(dev, &a7pll.clkr); in qcom_a7pll_probe()
82 &a7pll.clkr.hw); in qcom_a7pll_probe()
86 { .compatible = "qcom,sdx55-a7pll" },
94 .name = "qcom-a7pll",
Da53-pll.c154 { .compatible = "qcom,msm8226-a7pll" },
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dqcom,a7pll.yaml4 $id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml#
19 - qcom,sdx55-a7pll
45 a7pll: clock@17808000 {
46 compatible = "qcom,sdx55-a7pll";
Dqcom,a53pll.yaml24 - qcom,msm8226-a7pll
/linux-6.12.1/arch/arm/boot/dts/qcom/
Dqcom-sdx55.dtsi711 a7pll: clock@17808000 { label
712 compatible = "qcom,sdx55-a7pll";
723 clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>;
Dqcom-sdx65.dtsi639 a7pll: clock@17808000 { label
640 compatible = "qcom,sdx55-a7pll";
651 clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>;
Dqcom-msm8226.dtsi275 clocks = <&a7pll>, <&gcc GPLL0_VOTE>;
280 a7pll: clock@f9016000 { label
281 compatible = "qcom,msm8226-a7pll";