/linux-6.12.1/arch/mips/pci/ ! |
D | ops-rc32434.c | 48 unsigned char where, u32 *data) in config_access() argument 54 PCI_CFG_SET(bus->number, slot, func, where); in config_access() 73 int where, u8 *val) in read_config_byte() argument 78 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); in read_config_byte() 79 *val = (data >> ((where & 3) << 3)) & 0xff; in read_config_byte() 84 int where, u16 *val) in read_config_word() argument 89 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); in read_config_word() 90 *val = (data >> ((where & 3) << 3)) & 0xffff; in read_config_word() 95 int where, u32 *val) in read_config_dword() argument 108 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val); in read_config_dword() [all …]
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D | ops-bcm63xx.c | 20 static int postprocess_read(u32 data, int where, unsigned int size) in postprocess_read() argument 27 ret = (data >> ((where & 3) << 3)) & 0xff; in postprocess_read() 30 ret = (data >> ((where & 3) << 3)) & 0xffff; in postprocess_read() 39 static int preprocess_write(u32 orig_data, u32 val, int where, in preprocess_write() argument 47 ret = (orig_data & ~(0xff << ((where & 3) << 3))) | in preprocess_write() 48 (val << ((where & 3) << 3)); in preprocess_write() 51 ret = (orig_data & ~(0xffff << ((where & 3) << 3))) | in preprocess_write() 52 (val << ((where & 3) << 3)); in preprocess_write() 65 unsigned int devfn, int where) in bcm63xx_setup_cfg_access() argument 72 reg = where >> 2; in bcm63xx_setup_cfg_access() [all …]
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D | ops-msc.c | 34 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) in msc_pcibios_config_access() argument 47 ((where / 4) << MSC01_PCI_CFGADDR_RNUM_SHF))); in msc_pcibios_config_access() 76 int where, int size, u32 * val) in msc_pcibios_read() argument 80 if ((size == 2) && (where & 1)) in msc_pcibios_read() 82 else if ((size == 4) && (where & 3)) in msc_pcibios_read() 85 if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, in msc_pcibios_read() 90 *val = (data >> ((where & 3) << 3)) & 0xff; in msc_pcibios_read() 92 *val = (data >> ((where & 3) << 3)) & 0xffff; in msc_pcibios_read() 100 int where, int size, u32 val) in msc_pcibios_write() argument 104 if ((size == 2) && (where & 1)) in msc_pcibios_write() [all …]
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D | ops-bonito64.c | 26 unsigned int devfn, int where, in bonito64_pcibios_config_access() argument 35 int reg = where & ~3; in bonito64_pcibios_config_access() 90 int where, int size, u32 * val) in bonito64_pcibios_read() argument 94 if ((size == 2) && (where & 1)) in bonito64_pcibios_read() 96 else if ((size == 4) && (where & 3)) in bonito64_pcibios_read() 99 if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, in bonito64_pcibios_read() 104 *val = (data >> ((where & 3) << 3)) & 0xff; in bonito64_pcibios_read() 106 *val = (data >> ((where & 3) << 3)) & 0xffff; in bonito64_pcibios_read() 114 int where, int size, u32 val) in bonito64_pcibios_write() argument 118 if ((size == 2) && (where & 1)) in bonito64_pcibios_write() [all …]
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D | pci-bcm1480ht.c | 38 #define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where)) argument 39 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where) argument 97 int where, int size, u32 * val) in bcm1480ht_pcibios_read() argument 101 if ((size == 2) && (where & 1)) in bcm1480ht_pcibios_read() 103 else if ((size == 4) && (where & 3)) in bcm1480ht_pcibios_read() 107 data = READCFG32(CFGADDR(bus, devfn, where)); in bcm1480ht_pcibios_read() 112 *val = (data >> ((where & 3) << 3)) & 0xff; in bcm1480ht_pcibios_read() 114 *val = (data >> ((where & 3) << 3)) & 0xffff; in bcm1480ht_pcibios_read() 122 int where, int size, u32 val) in bcm1480ht_pcibios_write() argument 124 u32 cfgaddr = CFGADDR(bus, devfn, where); in bcm1480ht_pcibios_write() [all …]
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D | ops-loongson2.c | 34 unsigned int devfn, int where, in loongson_pcibios_config_access() argument 43 int reg = where & ~3; in loongson_pcibios_config_access() 119 int where, int size, u32 *val) in loongson_pcibios_read() argument 123 if ((size == 2) && (where & 1)) in loongson_pcibios_read() 125 else if ((size == 4) && (where & 3)) in loongson_pcibios_read() 128 if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, in loongson_pcibios_read() 133 *val = (data >> ((where & 3) << 3)) & 0xff; in loongson_pcibios_read() 135 *val = (data >> ((where & 3) << 3)) & 0xffff; in loongson_pcibios_read() 143 int where, int size, u32 val) in loongson_pcibios_write() argument 147 if ((size == 2) && (where & 1)) in loongson_pcibios_write() [all …]
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D | ops-lantiq.c | 27 unsigned int devfn, unsigned int where, u32 *data) in ltq_pci_config_access() argument 43 LTQ_PCI_CFG_FUNNUM_SHF) | (where & ~0x3); in ltq_pci_config_access() 72 int where, int size, u32 *val) in ltq_pci_read_config_dword() argument 76 if (ltq_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) in ltq_pci_read_config_dword() 80 *val = (data >> ((where & 3) << 3)) & 0xff; in ltq_pci_read_config_dword() 82 *val = (data >> ((where & 3) << 3)) & 0xffff; in ltq_pci_read_config_dword() 90 int where, int size, u32 val) in ltq_pci_write_config_dword() argument 98 devfn, where, &data)) in ltq_pci_write_config_dword() 102 data = (data & ~(0xff << ((where & 3) << 3))) | in ltq_pci_write_config_dword() 103 (val << ((where & 3) << 3)); in ltq_pci_write_config_dword() [all …]
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D | ops-gt64xxx_pci0.c | 31 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) in gt64xxx_pci0_pcibios_config_access() argument 47 ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) | in gt64xxx_pci0_pcibios_config_access() 92 int where, int size, u32 * val) in gt64xxx_pci0_pcibios_read() argument 97 where, &data)) in gt64xxx_pci0_pcibios_read() 101 *val = (data >> ((where & 3) << 3)) & 0xff; in gt64xxx_pci0_pcibios_read() 103 *val = (data >> ((where & 3) << 3)) & 0xffff; in gt64xxx_pci0_pcibios_read() 111 int where, int size, u32 val) in gt64xxx_pci0_pcibios_write() argument 119 devfn, where, &data)) in gt64xxx_pci0_pcibios_write() 123 data = (data & ~(0xff << ((where & 3) << 3))) | in gt64xxx_pci0_pcibios_write() 124 (val << ((where & 3) << 3)); in gt64xxx_pci0_pcibios_write() [all …]
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D | pci-sb1250.c | 40 #define CFGOFFSET(bus, devfn, where) (((bus)<<16) + ((devfn)<<8) + (where)) argument 41 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where) argument 117 int where, int size, u32 * val) in sb1250_pcibios_read() argument 121 if ((size == 2) && (where & 1)) in sb1250_pcibios_read() 123 else if ((size == 4) && (where & 3)) in sb1250_pcibios_read() 127 data = READCFG32(CFGADDR(bus, devfn, where)); in sb1250_pcibios_read() 132 *val = (data >> ((where & 3) << 3)) & 0xff; in sb1250_pcibios_read() 134 *val = (data >> ((where & 3) << 3)) & 0xffff; in sb1250_pcibios_read() 142 int where, int size, u32 val) in sb1250_pcibios_write() argument 144 u32 cfgaddr = CFGADDR(bus, devfn, where); in sb1250_pcibios_write() [all …]
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D | pci-bcm1480.c | 40 #define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where)) argument 41 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where) argument 108 int where, int size, u32 * val) in bcm1480_pcibios_read() argument 112 if ((size == 2) && (where & 1)) in bcm1480_pcibios_read() 114 else if ((size == 4) && (where & 3)) in bcm1480_pcibios_read() 118 data = READCFG32(CFGADDR(bus, devfn, where)); in bcm1480_pcibios_read() 123 *val = (data >> ((where & 3) << 3)) & 0xff; in bcm1480_pcibios_read() 125 *val = (data >> ((where & 3) << 3)) & 0xffff; in bcm1480_pcibios_read() 133 int where, int size, u32 val) in bcm1480_pcibios_write() argument 135 u32 cfgaddr = CFGADDR(bus, devfn, where); in bcm1480_pcibios_write() [all …]
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D | pci-alchemy.c | 100 unsigned int dev_fn, unsigned char where, u32 *data) in config_access() argument 135 offset = (function << 8) | (where & ~0x3); in config_access() 161 access_type, bus->number, device, where, *data, offset); in config_access() 189 int where, u8 *val) in read_config_byte() argument 192 int ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); in read_config_byte() 194 if (where & 1) in read_config_byte() 196 if (where & 2) in read_config_byte() 203 int where, u16 *val) in read_config_word() argument 206 int ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); in read_config_word() 208 if (where & 2) in read_config_word() [all …]
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/linux-6.12.1/drivers/pci/controller/ ! |
D | pci-thunder-ecam.c | 16 static void set_val(u32 v, int where, int size, u32 *val) in set_val() argument 18 int shift = (where & 3) * 8; in set_val() 20 pr_debug("set_val %04x: %08x\n", (unsigned int)(where & ~3), v); in set_val() 30 unsigned int devfn, int where, int size, u32 *val) in handle_ea_bar() argument 36 int where_a = where & 0xc; in handle_ea_bar() 39 set_val(e0, where, size, val); in handle_ea_bar() 50 set_val(v, where, size, val); in handle_ea_bar() 68 set_val(v, where, size, val); in handle_ea_bar() 77 set_val(v, where, size, val); in handle_ea_bar() 84 int where, int size, u32 *val) in thunder_ecam_p2_config_read() argument [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z13/ ! |
D | extended.json | 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in… 42 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 63 …"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the retur… 105 …"PublicDescription": "Increments by one for any cycle where a Level-1 cache or Level-1 TLB miss is… 112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 126 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 133 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 140 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 147 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/ ! |
D | pipeline.json | 39 …ration issued due to the backend interlock. This event counts every cycle where the issue of an op… 42 …ration issued due to the backend interlock. This event counts every cycle where the issue of an op… 45 …sued due to the backend, address interlock. This event counts every cycle where the issue of an op… 48 …sued due to the backend, address interlock. This event counts every cycle where the issue of an op… 51 …rlock, or the Vector Processing Unit (VPU). This event counts every cycle where there is a stall o… 54 …rlock, or the Vector Processing Unit (VPU). This event counts every cycle where there is a stall o… 57 … operation issued due to the backend, load. This event counts every cycle where there is a stall i… 60 … operation issued due to the backend, load. This event counts every cycle where there is a stall i… 63 …operation issued due to the backend, store. This event counts every cycle where there is a stall i… 66 …operation issued due to the backend, store. This event counts every cycle where there is a stall i… [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/amdzen2/ ! |
D | other.json | 5 "BriefDescription": "Cycles where the Micro-Op Queue is empty." 28 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 34 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 40 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 46 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 52 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 58 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 64 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 70 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 76 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… [all …]
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/linux-6.12.1/arch/sh/drivers/pci/ ! |
D | ops-sh7786.c | 20 struct pci_bus *bus, unsigned int devfn, int where, u32 *data) in sh7786_pcie_config_access() argument 28 reg = where & ~3; in sh7786_pcie_config_access() 90 int where, int size, u32 *val) in sh7786_pcie_read() argument 96 if ((size == 2) && (where & 1)) in sh7786_pcie_read() 98 else if ((size == 4) && (where & 3)) in sh7786_pcie_read() 103 devfn, where, &data); in sh7786_pcie_read() 110 *val = (data >> ((where & 3) << 3)) & 0xff; in sh7786_pcie_read() 112 *val = (data >> ((where & 2) << 3)) & 0xffff; in sh7786_pcie_read() 117 "where=0x%04x size=%d val=0x%08lx\n", bus->number, in sh7786_pcie_read() 118 devfn, where, size, (unsigned long)*val); in sh7786_pcie_read() [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z14/ ! |
D | extended.json | 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in… 42 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 63 …"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the retur… 105 …"PublicDescription": "Increments by one for any cycle where a level-1 cache or level-2 TLB miss is… 112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 126 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 133 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 140 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 147 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… [all …]
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/linux-6.12.1/arch/sparc/kernel/ ! |
D | pci_common.c | 55 int where, int size, u32 *value) in sun4u_read_pci_cfg_host() argument 61 addr = sun4u_config_mkaddr(pbm, bus, devfn, where); in sun4u_read_pci_cfg_host() 67 if (where < 8) { in sun4u_read_pci_cfg_host() 72 if (where & 1) in sun4u_read_pci_cfg_host() 83 if (where < 8) { in sun4u_read_pci_cfg_host() 97 where, 2, &tmp32); in sun4u_read_pci_cfg_host() 102 where + 2, 2, &tmp32); in sun4u_read_pci_cfg_host() 110 int where, int size, u32 *value) in sun4u_read_pci_cfg() argument 131 return sun4u_read_pci_cfg_host(pbm, bus, devfn, where, in sun4u_read_pci_cfg() 134 addr = sun4u_config_mkaddr(pbm, bus, devfn, where); in sun4u_read_pci_cfg() [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z15/ ! |
D | extended.json | 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in… 42 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 63 …"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the retur… 105 …"PublicDescription": "Increments by one for any cycle where a level-1 cache or level-2 TLB miss is… 112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 126 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 133 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 140 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 147 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z16/ ! |
D | extended.json | 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in… 91 …"PublicDescription": "Increments by one for any cycle where a level-1 cache or level-2 TLB miss is… 98 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 105 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 126 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 133 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 140 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 147 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/amdzen3/ ! |
D | other.json | 5 "BriefDescription": "Cycles where the Micro-Op Queue is empty." 22 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a T… 28 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a T… 34 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a T… 40 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a T… 46 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 52 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a T… 58 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a T… 64 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a T… 70 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_zec12/ ! |
D | extended.json | 21 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 28 …"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the retur… 35 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 49 …"PublicDescription": "A directory write to the Level-1 Data cache where the installed cache line w… 56 …"PublicDescription": "A directory write to the Level-1 Instruction cache where the installed cache… 63 …"PublicDescription": "A directory write to the Level-1 Data Cache where the line was originally in… 105 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… 126 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac… [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/tigerlake/ ! |
D | other.json | 3 …"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped… 7 …"PublicDescription": "Counts Core cycles where the core was running with power-delivery for baseli… 12 …"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped… 16 …"PublicDescription": "Counts Core cycles where the core was running with power-delivery for licens… 21 …"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped… 25 …"PublicDescription": "Core cycles where the core was running with power-delivery for license level…
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/linux-6.12.1/tools/perf/scripts/python/ ! |
D | export-to-sqlite.py | 57 # sqlite> select * from samples_view where id < 10; 59 # sqlite> select * from samples_view where id < 10; 102 printerr("where: columns 'all' or 'branches'"); 348 '(SELECT host_or_guest FROM machines_view WHERE id = machine_id) AS host_or_guest,' 358 '(SELECT short_name FROM dsos WHERE id=dso_id) AS dso,' 369 '(SELECT host_or_guest FROM machines_view WHERE id = machine_id) AS host_or_guest,' 378 '(SELECT comm FROM comms WHERE id = comm_id) AS command,' 380 '(SELECT pid FROM threads WHERE id = thread_id) AS pid,' 381 '(SELECT tid FROM threads WHERE id = thread_id) AS tid' 390 '(SELECT name FROM symbols WHERE id = c.symbol_id) AS symbol,' [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/amdzen5/ ! |
D | decode.json | 5 …"BriefDescription": "Cycles where the op queue is empty. Such cycles indicate that the front-end i… 40 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to an … 46 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a l… 52 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a l… 58 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a t… 64 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a f… 70 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to una… 76 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to una… 82 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to a p… 88 …"BriefDescription": "Cycles where a dispatch group is valid but does not get dispatched due to una… [all …]
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