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/linux-6.12.1/sound/core/seq/
Dseq_timer.c21 static void snd_seq_timer_set_tick_resolution(struct snd_seq_timer *tmr) in snd_seq_timer_set_tick_resolution() argument
24 tmr->tempo_base == 1000 ? 1000000 : 10000; in snd_seq_timer_set_tick_resolution()
26 if (tmr->tempo < threshold) in snd_seq_timer_set_tick_resolution()
27 tmr->tick.resolution = (tmr->tempo * tmr->tempo_base) / tmr->ppq; in snd_seq_timer_set_tick_resolution()
31 s = tmr->tempo % tmr->ppq; in snd_seq_timer_set_tick_resolution()
32 s = (s * tmr->tempo_base) / tmr->ppq; in snd_seq_timer_set_tick_resolution()
33 tmr->tick.resolution = (tmr->tempo / tmr->ppq) * tmr->tempo_base; in snd_seq_timer_set_tick_resolution()
34 tmr->tick.resolution += s; in snd_seq_timer_set_tick_resolution()
36 if (tmr->tick.resolution <= 0) in snd_seq_timer_set_tick_resolution()
37 tmr->tick.resolution = 1; in snd_seq_timer_set_tick_resolution()
[all …]
Dseq_timer.h51 void snd_seq_timer_delete(struct snd_seq_timer **tmr);
112 void snd_seq_timer_defaults(struct snd_seq_timer *tmr);
113 void snd_seq_timer_reset(struct snd_seq_timer *tmr);
114 int snd_seq_timer_stop(struct snd_seq_timer *tmr);
115 int snd_seq_timer_start(struct snd_seq_timer *tmr);
116 int snd_seq_timer_continue(struct snd_seq_timer *tmr);
117 int snd_seq_timer_set_tempo(struct snd_seq_timer *tmr, int tempo);
118 int snd_seq_timer_set_tempo_ppq(struct snd_seq_timer *tmr, int tempo, int ppq,
120 int snd_seq_timer_set_position_tick(struct snd_seq_timer *tmr, snd_seq_tick_time_t position);
121 int snd_seq_timer_set_position_time(struct snd_seq_timer *tmr, snd_seq_real_time_t position);
[all …]
Dseq_queue.c418 struct snd_seq_timer *tmr; in snd_seq_queue_timer_open() local
423 tmr = queue->timer; in snd_seq_queue_timer_open()
426 snd_seq_timer_defaults(tmr); in snd_seq_queue_timer_open()
717 struct snd_seq_timer *tmr; in snd_seq_info_queues_read() local
726 tmr = q->timer; in snd_seq_info_queues_read()
727 if (tmr->tempo) in snd_seq_info_queues_read()
728 bpm = (60000 * tmr->tempo_base) / tmr->tempo; in snd_seq_info_queues_read()
742 snd_iprintf(buffer, "timer state : %s\n", tmr->running ? "Running" : "Stopped"); in snd_seq_info_queues_read()
743 snd_iprintf(buffer, "timer PPQ : %d\n", tmr->ppq); in snd_seq_info_queues_read()
744 snd_iprintf(buffer, "current tempo : %d\n", tmr->tempo); in snd_seq_info_queues_read()
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/timer/
Dbase.c29 struct nvkm_subdev *subdev = &wait->tmr->subdev; in nvkm_timer_wait_test()
30 u64 time = nvkm_timer_read(wait->tmr); in nvkm_timer_wait_test()
57 wait->tmr = device->timer; in nvkm_timer_wait_init()
63 nvkm_timer_read(struct nvkm_timer *tmr) in nvkm_timer_read() argument
65 return tmr->func->read(tmr); in nvkm_timer_read()
69 nvkm_timer_alarm_trigger(struct nvkm_timer *tmr) in nvkm_timer_alarm_trigger() argument
76 spin_lock_irqsave(&tmr->lock, flags); in nvkm_timer_alarm_trigger()
77 list_for_each_entry_safe(alarm, atemp, &tmr->alarms, head) { in nvkm_timer_alarm_trigger()
79 if (alarm->timestamp > nvkm_timer_read(tmr)) { in nvkm_timer_alarm_trigger()
81 tmr->func->alarm_init(tmr, alarm->timestamp); in nvkm_timer_alarm_trigger()
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Dnv04.c28 nv04_timer_time(struct nvkm_timer *tmr, u64 time) in nv04_timer_time() argument
30 struct nvkm_subdev *subdev = &tmr->subdev; in nv04_timer_time()
43 nv04_timer_read(struct nvkm_timer *tmr) in nv04_timer_read() argument
45 struct nvkm_device *device = tmr->subdev.device; in nv04_timer_read()
57 nv04_timer_alarm_fini(struct nvkm_timer *tmr) in nv04_timer_alarm_fini() argument
59 struct nvkm_device *device = tmr->subdev.device; in nv04_timer_alarm_fini()
64 nv04_timer_alarm_init(struct nvkm_timer *tmr, u32 time) in nv04_timer_alarm_init() argument
66 struct nvkm_device *device = tmr->subdev.device; in nv04_timer_alarm_init()
72 nv04_timer_intr(struct nvkm_timer *tmr) in nv04_timer_intr() argument
74 struct nvkm_subdev *subdev = &tmr->subdev; in nv04_timer_intr()
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/linux-6.12.1/drivers/clocksource/
Dtimer-ixp4xx.c84 struct ixp4xx_timer *tmr = dev_id; in ixp4xx_timer_interrupt() local
85 struct clock_event_device *evt = &tmr->clkevt; in ixp4xx_timer_interrupt()
89 tmr->base + IXP4XX_OSST_OFFSET); in ixp4xx_timer_interrupt()
99 struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt); in ixp4xx_set_next_event() local
102 val = __raw_readl(tmr->base + IXP4XX_OSRT1_OFFSET); in ixp4xx_set_next_event()
106 tmr->base + IXP4XX_OSRT1_OFFSET); in ixp4xx_set_next_event()
113 struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt); in ixp4xx_shutdown() local
116 val = __raw_readl(tmr->base + IXP4XX_OSRT1_OFFSET); in ixp4xx_shutdown()
118 __raw_writel(val, tmr->base + IXP4XX_OSRT1_OFFSET); in ixp4xx_shutdown()
125 struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt); in ixp4xx_set_oneshot() local
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Dtimer-tegra186.c74 struct tegra186_tmr *tmr; member
93 static void tmr_writel(struct tegra186_tmr *tmr, u32 value, unsigned int offset) in tmr_writel() argument
95 writel_relaxed(value, tmr->regs + offset); in tmr_writel()
112 struct tegra186_tmr *tmr; in tegra186_tmr_create() local
114 tmr = devm_kzalloc(tegra->dev, sizeof(*tmr), GFP_KERNEL); in tegra186_tmr_create()
115 if (!tmr) in tegra186_tmr_create()
118 tmr->parent = tegra; in tegra186_tmr_create()
119 tmr->regs = tegra->regs + offset; in tegra186_tmr_create()
120 tmr->index = index; in tegra186_tmr_create()
121 tmr->hwirq = 0; in tegra186_tmr_create()
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/linux-6.12.1/drivers/target/
Dtarget_core_tmr.c32 struct se_tmr_req *tmr; in core_tmr_alloc_req() local
34 tmr = kzalloc(sizeof(struct se_tmr_req), gfp_flags); in core_tmr_alloc_req()
35 if (!tmr) { in core_tmr_alloc_req()
41 se_cmd->se_tmr_req = tmr; in core_tmr_alloc_req()
42 tmr->task_cmd = se_cmd; in core_tmr_alloc_req()
43 tmr->fabric_tmr_ptr = fabric_tmr_ptr; in core_tmr_alloc_req()
44 tmr->function = function; in core_tmr_alloc_req()
45 INIT_LIST_HEAD(&tmr->tmr_list); in core_tmr_alloc_req()
51 void core_tmr_release_req(struct se_tmr_req *tmr) in core_tmr_release_req() argument
53 kfree(tmr); in core_tmr_release_req()
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Dtarget_core_user.c1149 * queue_tmr_ring - queue tmr info to ring or internally
1151 * @tmr: tcmu_tmr containing tmr info to queue
1158 queue_tmr_ring(struct tcmu_dev *udev, struct tcmu_tmr *tmr) in queue_tmr_ring() argument
1169 id_list_sz = sizeof(tmr->tmr_cmd_ids[0]) * tmr->tmr_cmd_cnt; in queue_tmr_ring()
1174 list_add_tail(&tmr->queue_entry, &udev->tmr_queue); in queue_tmr_ring()
1175 pr_debug("adding tmr %p on dev %s to TMR ring space wait queue\n", in queue_tmr_ring()
1176 tmr, udev->name); in queue_tmr_ring()
1186 entry->tmr_type = tmr->tmr_type; in queue_tmr_ring()
1187 entry->cmd_cnt = tmr->tmr_cmd_cnt; in queue_tmr_ring()
1188 memcpy(&entry->cmd_ids[0], &tmr->tmr_cmd_ids[0], id_list_sz); in queue_tmr_ring()
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/linux-6.12.1/arch/powerpc/sysdev/
Dfsl_gtm.c146 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
151 void gtm_put_timer16(struct gtm_timer *tmr) in gtm_put_timer16() argument
153 gtm_stop_timer16(tmr); in gtm_put_timer16()
155 spin_lock_irq(&tmr->gtm->lock); in gtm_put_timer16()
156 tmr->requested = false; in gtm_put_timer16()
157 spin_unlock_irq(&tmr->gtm->lock); in gtm_put_timer16()
165 static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency, in gtm_set_ref_timer16() argument
168 struct gtm *gtm = tmr->gtm; in gtm_set_ref_timer16()
169 int num = tmr - &gtm->timers[0]; in gtm_set_ref_timer16()
178 if (!tmr->gtpsr) in gtm_set_ref_timer16()
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/linux-6.12.1/Documentation/devicetree/bindings/misc/
Dxlnx,tmr-manager.yaml4 $id: http://devicetree.org/schemas/misc/xlnx,tmr-manager.yaml#
7 title: Xilinx Triple Modular Redundancy(TMR) Manager IP
13 The Triple Modular Redundancy(TMR) Manager is responsible for handling the
14 TMR subsystem state, including fault detection and error recovery. The core
15 is triplicated in each of the sub-blocks in the TMR subsystem, and provides
21 - xlnx,tmr-manager-1.0
43 tmr-manager@44a10000 {
44 compatible = "xlnx,tmr-manager-1.0";
Dxlnx,tmr-inject.yaml4 $id: http://devicetree.org/schemas/misc/xlnx,tmr-inject.yaml#
7 title: Xilinx Triple Modular Redundancy(TMR) Inject IP
13 The Triple Modular Redundancy(TMR) Inject core provides functional fault
15 possibility to verify that the TMR subsystem error detection and fault
21 - xlnx,tmr-inject-1.0
44 compatible = "xlnx,tmr-inject-1.0";
/linux-6.12.1/drivers/misc/
Dxilinx_tmr_manager.c3 * Driver for Xilinx TMR Manager IP.
8 * This driver is developed for TMR Manager,The Triple Modular Redundancy(TMR)
9 * Manager is responsible for handling the TMR subsystem state, including
11 * the sub-blocks in the TMR subsystem, and provides majority voting of
21 /* TMR Manager Register offsets */
44 * struct xtmr_manager_dev - Driver data for TMR Manager
137 * in the tmr manager, update the xtmr_manager cr_val for the same in xtmr_manager_init()
144 * break handler, Below api updates the TMR manager address and in xtmr_manager_init()
192 /* Initialize TMR Manager */ in xtmr_manager_probe()
202 .compatible = "xlnx,tmr-manager-1.0",
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Dxilinx_tmr_inject.c3 * Driver for Xilinx TMR Inject IP.
8 * This driver is developed for TMR Inject IP,The Triple Modular Redundancy(TMR)
19 /* TMR Inject Register offsets */
34 * struct xtmr_inject_dev - Driver data for TMR Inject
137 /* Initialize TMR Inject */ in xtmr_inject_probe()
155 .compatible = "xlnx,tmr-inject-1.0",
171 MODULE_DESCRIPTION("Xilinx TMR Inject Driver");
/linux-6.12.1/Documentation/devicetree/bindings/ptp/
Dfsl,ptp.yaml59 fsl,tmr-prsc:
63 fsl,tmr-add:
67 fsl,tmr-fiper1:
71 fsl,tmr-fiper2:
75 fsl,tmr-fiper3:
151 fsl,tmr-prsc = <100>;
152 fsl,tmr-add = <0x999999a4>;
153 fsl,tmr-fiper1 = <0x3b9ac9f6>;
154 fsl,tmr-fiper2 = <0x00018696>;
/linux-6.12.1/arch/powerpc/include/asm/
Dfsl_gtm.h35 extern void gtm_put_timer16(struct gtm_timer *tmr);
36 extern int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec,
38 extern int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec,
40 extern void gtm_stop_timer16(struct gtm_timer *tmr);
41 extern void gtm_ack_timer16(struct gtm_timer *tmr, u16 events);
/linux-6.12.1/fs/
Dtimerfd.c33 struct hrtimer tmr; member
77 t.tmr); in timerfd_tmrproc()
184 remaining = hrtimer_expires_remaining_adjusted(&ctx->t.tmr); in timerfd_get_remaining()
210 hrtimer_init(&ctx->t.tmr, clockid, htmode); in timerfd_setup()
211 hrtimer_set_expires(&ctx->t.tmr, texp); in timerfd_setup()
212 ctx->t.tmr.function = timerfd_tmrproc; in timerfd_setup()
224 hrtimer_start(&ctx->t.tmr, texp, htmode); in timerfd_setup()
244 hrtimer_cancel(&ctx->t.tmr); in timerfd_release()
307 ticks += hrtimer_forward_now(&ctx->t.tmr, in timerfd_read_iter()
309 hrtimer_restart(&ctx->t.tmr); in timerfd_read_iter()
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/linux-6.12.1/tools/testing/selftests/kvm/x86_64/
Dxen_shinfo_test.c593 struct kvm_xen_vcpu_attr tmr = { in main() local
623 vcpu_ioctl(vcpu, KVM_XEN_VCPU_SET_ATTR, &tmr); in main()
808 memset(&tmr, 0, sizeof(tmr)); in main()
809 tmr.type = KVM_XEN_VCPU_ATTR_TYPE_TIMER; in main()
810 vcpu_ioctl(vcpu, KVM_XEN_VCPU_GET_ATTR, &tmr); in main()
811 TEST_ASSERT(tmr.u.timer.port == EVTCHN_TIMER, in main()
813 TEST_ASSERT(tmr.u.timer.priority == KVM_IRQ_ROUTING_XEN_EVTCHN_PRIO_2LEVEL, in main()
815 TEST_ASSERT(tmr.u.timer.expires_ns > rs->state_entry_time, in main()
829 tmr.u.timer.expires_ns = rs->state_entry_time + 100000000; in main()
830 vcpu_ioctl(vcpu, KVM_XEN_VCPU_SET_ATTR, &tmr); in main()
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/linux-6.12.1/drivers/target/iscsi/
Discsi_target_tmr.c74 pr_err("TMR Opcode TARGET_WARM_RESET authorization" in iscsit_tmr_task_warm_reset()
94 pr_err("TMR Opcode TARGET_COLD_RESET authorization" in iscsit_tmr_task_cold_reset()
117 pr_debug("Got TASK_REASSIGN TMR ITT: 0x%08x," in iscsit_tmr_task_reassign()
122 pr_err("TMR TASK_REASSIGN not supported in ERL<2," in iscsit_tmr_task_reassign()
145 " TMR TASK_REASSIGN.\n"); in iscsit_tmr_task_reassign()
152 " TMR TASK_REASSIGN.\n"); in iscsit_tmr_task_reassign()
236 * the TMR TASK_REASSIGN's ExpDataSN. in iscsit_task_reassign_complete_write()
247 * The TMR TASK_REASSIGN's ExpDataSN contains the next R2TSN the in iscsit_task_reassign_complete_write()
307 * the TMR TASK_REASSIGN's ExpDataSN. in iscsit_task_reassign_complete_read()
336 * The TMR TASK_REASSIGN's ExpDataSN contains the next DataSN the in iscsit_task_reassign_complete_read()
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
Dfan.c36 struct nvkm_timer *tmr = subdev->device->timer; in nvkm_fan_update() local
98 nvkm_timer_alarm(tmr, delay * 1000 * 1000, &fan->alarm); in nvkm_fan_update()
127 struct nvkm_timer *tmr = device->timer; in nvkm_therm_fan_sense() local
142 start = nvkm_timer_read(tmr); in nvkm_therm_fan_sense()
153 start = nvkm_timer_read(tmr); in nvkm_therm_fan_sense()
157 } while (cycles < 5 && nvkm_timer_read(tmr) - start < 250000000); in nvkm_therm_fan_sense()
158 end = nvkm_timer_read(tmr); in nvkm_therm_fan_sense()
216 struct nvkm_timer *tmr = therm->subdev.device->timer; in nvkm_therm_fan_fini() local
218 nvkm_timer_alarm(tmr, 0, &therm->fan->alarm); in nvkm_therm_fan_fini()
/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dbsc9131rdb.dtsi88 fsl,tmr-prsc = <2>;
89 fsl,tmr-add = <0xcccccccd>;
90 fsl,tmr-fiper1 = <999999995>;
91 fsl,tmr-fiper2 = <99990>;
Dbsc9132qds.dtsi95 fsl,tmr-prsc = <2>;
96 fsl,tmr-add = <0xcccccccd>;
97 fsl,tmr-fiper1 = <999999995>;
98 fsl,tmr-fiper2 = <99990>;
/linux-6.12.1/drivers/scsi/isci/
Disci.h501 void sci_init_timer(struct sci_timer *tmr, void (*fn)(struct timer_list *t)) in sci_init_timer() argument
503 tmr->cancel = false; in sci_init_timer()
504 timer_setup(&tmr->timer, fn, 0); in sci_init_timer()
507 static inline void sci_mod_timer(struct sci_timer *tmr, unsigned long msec) in sci_mod_timer() argument
509 tmr->cancel = false; in sci_mod_timer()
510 mod_timer(&tmr->timer, jiffies + msecs_to_jiffies(msec)); in sci_mod_timer()
513 static inline void sci_del_timer(struct sci_timer *tmr) in sci_del_timer() argument
515 tmr->cancel = true; in sci_del_timer()
516 del_timer(&tmr->timer); in sci_del_timer()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dpsp_gfx_if.h93 GFX_CMD_ID_SETUP_TMR = 0x00000005, /* setup TMR region */
95 GFX_CMD_ID_DESTROY_TMR = 0x00000007, /* destroy TMR region */
102 GFX_CMD_ID_LOAD_TOC = 0x00000020, /* Load TOC and obtain TMR size */
182 /* Command to setup TMR region. */
185 …uint32_t buf_phy_addr_lo; /* bits [31:0] of GPU Virtual address of TMR buffer (must b…
186 uint32_t buf_phy_addr_hi; /* bits [63:32] of GPU Virtual address of TMR buffer */
196 …uint32_t system_phy_addr_lo; /* bits [31:0] of system physical address of TMR buffer…
197 …uint32_t system_phy_addr_hi; /* bits [63:32] of system physical address of TMR buffe…
402 …uint32_t fw_addr_lo; /* +8 bits [31:0] of FW address within TMR (in response to cmd_load_ip_fw co…
403 …uint32_t fw_addr_hi; /* +12 bits [63:32] of FW address within TMR (in response to cmd_load_ip_fw c…
[all …]
/linux-6.12.1/drivers/ptp/
Dptp_qoriq.c405 * "fsl,tmr-prsc"
406 * "fsl,tmr-add"
407 * "fsl,tmr-fiper1"
408 * "fsl,tmr-fiper2"
409 * "fsl,tmr-fiper3" (required only for DPAA2 and ENETC hardware)
498 "fsl,tmr-prsc", &ptp_qoriq->tmr_prsc) || in ptp_qoriq_init()
500 "fsl,tmr-add", &ptp_qoriq->tmr_add) || in ptp_qoriq_init()
502 "fsl,tmr-fiper1", &ptp_qoriq->tmr_fiper1) || in ptp_qoriq_init()
504 "fsl,tmr-fiper2", &ptp_qoriq->tmr_fiper2) || in ptp_qoriq_init()
508 of_property_read_u32(node, "fsl,tmr-fiper3", in ptp_qoriq_init()

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