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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Drockchip,rk3588-hdptx-phy.yaml89 <&cru SRST_HDPTX0_LANE>, <&cru SRST_HDPTX0_ROPLL>,
/linux-6.12.1/include/dt-bindings/reset/
Drockchip,rk3588-cru.h700 #define SRST_HDPTX0_LANE 613 macro
/linux-6.12.1/drivers/clk/rockchip/
Drst-rk3588.c790 RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX0_LANE, 3, 13),
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3588-base.dtsi2776 <&cru SRST_HDPTX0_LANE>, <&cru SRST_HDPTX0_ROPLL>,