Home
last modified time | relevance | path

Searched full:snvs (Results 1 – 25 of 58) sorted by relevance

123

/linux-6.12.1/Documentation/devicetree/bindings/nvmem/
Dsnvs-lpgpr.yaml4 $id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml#
17 - fsl,imx8mm-snvs-lpgpr
18 - fsl,imx8mn-snvs-lpgpr
19 - fsl,imx8mp-snvs-lpgpr
20 - fsl,imx8mq-snvs-lpgpr
21 - const: fsl,imx7d-snvs-lpgpr
23 - fsl,imx6q-snvs-lpgpr
24 - fsl,imx6ul-snvs-lpgpr
25 - fsl,imx7d-snvs-lpgpr
34 snvs@20cc000 {
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/crypto/
Dfsl,sec-v4.0-mon.yaml8 title: Freescale Secure Non-Volatile Storage (SNVS)
16 Node defines address range and the associated interrupt for the SNVS function.
43 snvs-rtc-lp:
47 Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
57 const: snvs-rtc
78 snvs-powerkey:
82 The snvs-pwrkey is designed to enable POWER key function which controlled
83 by SNVS ONOFF, the driver can report the status of POWER key and wakeup
94 const: snvs-pwrkey
119 snvs-lpgpr:
[all …]
/linux-6.12.1/drivers/input/keyboard/
Dsnvs_pwrkey.c3 // Driver for the IMX SNVS ON/OFF Power Key
35 struct regmap *snvs; member
51 regmap_read(pdata->snvs, SNVS_HPSR_REG, &state); in imx_imx_snvs_check_for_events()
78 regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); in imx_snvs_pwrkey_interrupt()
98 regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); in imx_snvs_pwrkey_interrupt()
119 /* Get SNVS register Page */ in imx_snvs_pwrkey_probe()
128 pdata->snvs = syscon_regmap_lookup_by_phandle(np, "regmap"); in imx_snvs_pwrkey_probe()
129 if (IS_ERR(pdata->snvs)) { in imx_snvs_pwrkey_probe()
130 dev_err(&pdev->dev, "Can't get snvs syscon\n"); in imx_snvs_pwrkey_probe()
131 return PTR_ERR(pdata->snvs); in imx_snvs_pwrkey_probe()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Drohm,bd71847-pmic.yaml45 # states. States are called as SNVS and READY. At READY state all the PMIC
46 # power outputs go down and OTP is reload. At the SNVS state all other logic
47 # and external devices apart from the SNVS power domain are shut off. Please
48 # refer to NXP i.MX8 documentation for further information regarding SNVS
49 # state. When a reset is done via SNVS state the PMIC OTP data is not reload.
51 # reset has switched power state to SNVS. If reset is done via READY state the
53 # target state is set to READY by default. If SNVS state is used the boot
57 rohm,reset-snvs-powered:
59 Transfer PMIC to SNVS state at reset.
144 rohm,reset-snvs-powered;
Drohm,bd71837-pmic.yaml45 # are called as SNVS and READY. At READY state all the PMIC power outputs go
46 # down and OTP is reload. At the SNVS state all other logic and external
47 # devices apart from the SNVS power domain are shut off. Please refer to NXP
48 # i.MX8 documentation for further information regarding SNVS state. When a
49 # reset is done via SNVS state the PMIC OTP data is not reload. This causes
51 # switched power state to SNVS. If reset is done via READY state the power
53 # target state is set to READY by default. If SNVS state is used the boot
57 rohm,reset-snvs-powered:
59 Transfer PMIC to SNVS state at reset
141 rohm,reset-snvs-powered;
/linux-6.12.1/Documentation/devicetree/bindings/regulator/
Drohm,bd71815-regulator.yaml63 rohm,dvs-snvs-voltage:
65 Whether to keep regulator enabled at "SNVS" state or not.
66 0 means regulator should be disabled at SNVS state, non zero voltage
68 when PMIC transitions to SNVS.SNVS voltage depends on the previous
69 state (from which the PMIC transitioned to SNVS).
106 # for each of the HW states (RUN/SNVS/SUSPEND/LPSR). HW defaults can
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6ull-dhcom-som.dtsi588 pinctrl_snvs_dhcom_a: snvs-dhcom-a-grp {
592 pinctrl_snvs_dhcom_b: snvs-dhcom-b-grp {
596 pinctrl_snvs_dhcom_c: snvs-dhcom-c-grp {
600 pinctrl_snvs_dhcom_d: snvs-dhcom-d-grp {
604 pinctrl_snvs_dhcom_e: snvs-dhcom-e-grp {
608 pinctrl_snvs_dhcom_f: snvs-dhcom-f-grp {
612 pinctrl_snvs_dhcom_g: snvs-dhcom-g-grp {
616 pinctrl_snvs_dhcom_h: snvs-dhcom-h-grp {
620 pinctrl_snvs_fec1_phy: snvs-fec1-phy-grp {
626 pinctrl_snvs_fec2_phy: snvs-fec2-phy-grp {
Dimx6ull.dtsi7 #include "imx6ull-pinfunc-snvs.h"
79 compatible = "fsl,imx6ull-iomuxc-snvs";
Dimx6sll.dtsi559 snvs: snvs@20cc000 { label
563 snvs_rtc: snvs-rtc-lp {
565 regmap = <&snvs>;
571 snvs_poweroff: snvs-poweroff {
573 regmap = <&snvs>;
579 snvs_pwrkey: snvs-powerkey {
581 regmap = <&snvs>;
Dimx6ul.dtsi665 snvs: snvs@20cc000 { label
669 snvs_rtc: snvs-rtc-lp {
671 regmap = <&snvs>;
677 snvs_poweroff: snvs-poweroff {
679 regmap = <&snvs>;
686 snvs_pwrkey: snvs-powerkey {
688 regmap = <&snvs>;
695 snvs_lpgpr: snvs-lpgpr {
696 compatible = "fsl,imx6ul-snvs-lpgpr";
Dimx7s.dtsi625 snvs: snvs@30370000 { label
629 snvs_rtc: snvs-rtc-lp {
631 regmap = <&snvs>;
636 clock-names = "snvs-rtc";
639 snvs_poweroff: snvs-poweroff {
641 regmap = <&snvs>;
648 snvs_pwrkey: snvs-powerkey {
650 regmap = <&snvs>;
653 clock-names = "snvs-pwrkey";
Dimx6qdl.dtsi820 snvs: snvs@20cc000 { label
824 snvs_rtc: snvs-rtc-lp {
826 regmap = <&snvs>;
832 snvs_poweroff: snvs-poweroff {
834 regmap = <&snvs>;
841 snvs_pwrkey: snvs-powerkey {
843 regmap = <&snvs>;
850 snvs_lpgpr: snvs-lpgpr {
851 compatible = "fsl,imx6q-snvs-lpgpr";
Dimx6ull-dhcor-maveo-box.dts334 pinctrl_snvs_hog_maveo_box: snvs-hog-maveo-box-grp {
347 pinctrl_snvs_wifi_gpio: snvs-wifi-gpio-grp {
353 pinctrl_snvs_zigbee_gpio: snvs-zigbee-gpio-grp {
Dimx6sl.dtsi653 snvs: snvs@20cc000 { label
657 snvs_rtc: snvs-rtc-lp {
659 regmap = <&snvs>;
665 snvs_poweroff: snvs-poweroff {
667 regmap = <&snvs>;
Dimx6sx.dtsi744 snvs: snvs@20cc000 { label
748 snvs_rtc: snvs-rtc-lp {
750 regmap = <&snvs>;
755 snvs_poweroff: snvs-poweroff {
757 regmap = <&snvs>;
764 snvs_pwrkey: snvs-powerkey {
766 regmap = <&snvs>;
/linux-6.12.1/drivers/nvmem/
Dsnvs_lpgpr.c138 { .compatible = "fsl,imx6q-snvs-lpgpr", .data = &snvs_lpgpr_cfg_imx6q },
139 { .compatible = "fsl,imx6ul-snvs-lpgpr",
141 { .compatible = "fsl,imx7d-snvs-lpgpr", .data = &snvs_lpgpr_cfg_imx7d },
DKconfig297 i.MX6 and i.MX7 SoCs in Secure Non-Volatile Storage (SNVS) of this chip.
300 will be called nvmem-snvs-lpgpr.
/linux-6.12.1/drivers/rtc/
Drtc-snvs.c334 dev_warn(&pdev->dev, "snvs rtc: you use old dts file, please update it\n"); in snvs_rtc_probe()
347 dev_err(&pdev->dev, "Can't find snvs syscon\n"); in snvs_rtc_probe()
355 data->clk = devm_clk_get(&pdev->dev, "snvs-rtc"); in snvs_rtc_probe()
362 "Could not prepare or enable the snvs clock\n"); in snvs_rtc_probe()
445 MODULE_DESCRIPTION("Freescale SNVS RTC Driver");
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx6ul-pinctrl.yaml23 - fsl,imx6ull-iomuxc-snvs
108 compatible = "fsl,imx6ull-iomuxc-snvs";
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mm.dtsi605 snvs: snvs@30370000 { label
609 snvs_rtc: snvs-rtc-lp {
611 regmap = <&snvs>;
616 clock-names = "snvs-rtc";
619 snvs_pwrkey: snvs-powerkey {
621 regmap = <&snvs>;
624 clock-names = "snvs-pwrkey";
630 snvs_lpgpr: snvs-lpgpr {
631 compatible = "fsl,imx8mm-snvs-lpgpr",
632 "fsl,imx7d-snvs-lpgpr";
Dimx8mn.dtsi611 snvs: snvs@30370000 { label
615 snvs_rtc: snvs-rtc-lp {
617 regmap = <&snvs>;
622 clock-names = "snvs-rtc";
625 snvs_pwrkey: snvs-powerkey {
627 regmap = <&snvs>;
630 clock-names = "snvs-pwrkey";
Dimx8mp.dtsi696 snvs: snvs@30370000 { label
700 snvs_rtc: snvs-rtc-lp {
702 regmap = <&snvs>;
707 clock-names = "snvs-rtc";
710 snvs_pwrkey: snvs-powerkey {
712 regmap = <&snvs>;
715 clock-names = "snvs-pwrkey";
721 snvs_lpgpr: snvs-lpgpr {
722 compatible = "fsl,imx8mp-snvs-lpgpr",
723 "fsl,imx7d-snvs-lpgpr";
Dimx8mq.dtsi822 snvs: snvs@30370000 { label
826 snvs_rtc: snvs-rtc-lp {
828 regmap = <&snvs>;
833 clock-names = "snvs-rtc";
836 snvs_pwrkey: snvs-powerkey {
838 regmap = <&snvs>;
841 clock-names = "snvs-pwrkey";
Dimx8mn-ddr4-evk.dts60 rohm,reset-snvs-powered;
/linux-6.12.1/drivers/regulator/
Drohm-regulator.c103 prop = "rohm,dvs-snvs-voltage"; in rohm_regulator_set_dvs_levels()

123