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/linux-6.12.1/Documentation/devicetree/bindings/interconnect/
Dqcom,sm8650-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
21 See also:: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
26 - qcom,sm8650-aggre1-noc
27 - qcom,sm8650-aggre2-noc
28 - qcom,sm8650-clk-virt
29 - qcom,sm8650-cnoc-main
30 - qcom,sm8650-config-noc
31 - qcom,sm8650-gem-noc
32 - qcom,sm8650-lpass-ag-noc
[all …]
Dqcom,msm8998-bwmon.yaml38 - qcom,sm8650-cpu-bwmon
49 - qcom,sm8650-llcc-bwmon
/linux-6.12.1/Documentation/devicetree/bindings/display/msm/
Dqcom,sm8650-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml#
7 title: Qualcomm SM8650 Display MDSS
13 SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
20 const: qcom,sm8650-mdss
43 const: qcom,sm8650-dpu
50 const: qcom,sm8650-dp
58 - const: qcom,sm8650-dsi-ctrl
66 const: qcom,sm8650-dsi-phy-4nm
80 compatible = "qcom,sm8650-mdss";
104 compatible = "qcom,sm8650-dpu";
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Dqcom,sm8650-dpu.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml#
7 title: Qualcomm SM8650 Display DPU
17 - qcom,sm8650-dpu
61 compatible = "qcom,sm8650-dpu";
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dqcom,sm8650-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8650 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM8650 SoC.
19 const: qcom,sm8650-lpass-lpi-pinctrl
38 - $ref: "#/$defs/qcom-sm8650-lpass-state"
41 $ref: "#/$defs/qcom-sm8650-lpass-state"
45 qcom-sm8650-lpass-state:
90 compatible = "qcom,sm8650-lpass-lpi-pinctrl";
Dqcom,sm8650-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM8650 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8650 SoC.
20 const: qcom,sm8650-tlmm
38 - $ref: "#/$defs/qcom-sm8650-tlmm-state"
41 $ref: "#/$defs/qcom-sm8650-tlmm-state"
45 qcom-sm8650-tlmm-state:
113 compatible = "qcom,sm8650-tlmm";
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dqcom,sm8650-gcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm8650-gcc.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM8650
14 domains on SM8650
16 See also:: include/dt-bindings/clock/qcom,sm8650-gcc.h
20 const: qcom,sm8650-gcc
49 compatible = "qcom,sm8650-gcc";
Dqcom,sm8550-tcsr.yaml18 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
25 - qcom,sm8650-tcsr
Dqcom,sm8450-gpucc.yaml21 include/dt-bindings/reset/qcom,sm8650-gpucc.h
30 - qcom,sm8650-gpucc
Dqcom,sm8450-videocc.yaml19 include/dt-bindings/clock/qcom,sm8650-videocc.h
26 - qcom,sm8650-videocc
Dqcom,sm8450-camcc.yaml21 include/dt-bindings/clock/qcom,sm8650-camcc.h
30 - qcom,sm8650-camcc
Dqcom,sm8550-dispcc.yaml19 - include/dt-bindings/clock/qcom,sm8650-dispcc.h
26 - qcom,sm8650-dispcc
/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/
Dqcom,sm8550-pas.yaml23 - qcom,sm8650-adsp-pas
24 - qcom,sm8650-cdsp-pas
25 - qcom,sm8650-mpss-pas
74 - qcom,sm8650-adsp-pas
89 - qcom,sm8650-cdsp-pas
118 - qcom,sm8650-mpss-pas
134 - qcom,sm8650-adsp-pas
153 - qcom,sm8650-mpss-pas
169 - qcom,sm8650-cdsp-pas
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dqcom,sc8280xp-qmp-pcie-phy.yaml39 - qcom,sm8650-qmp-gen3x2-pcie-phy
40 - qcom,sm8650-qmp-gen4x2-pcie-phy
155 - qcom,sm8650-qmp-gen3x2-pcie-phy
156 - qcom,sm8650-qmp-gen4x2-pcie-phy
202 - qcom,sm8650-qmp-gen4x2-pcie-phy
225 - qcom,sm8650-qmp-gen4x2-pcie-phy
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm8650.dtsi7 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
8 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
17 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
23 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
370 compatible = "qcom,scm-sm8650", "qcom,scm";
378 compatible = "qcom,sm8650-clk-virt";
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Dsm8650-mtp.dts9 #include "sm8650.dtsi"
20 model = "Qualcomm Technologies, Inc. SM8650 MTP";
21 compatible = "qcom,sm8650-mtp", "qcom,sm8650";
32 compatible = "qcom,sm8650-pmic-glink",
70 compatible = "qcom,sm8650-sndcard", "qcom,sm8450-sndcard";
71 model = "SM8650-MTP";
700 firmware-name = "qcom/sm8650/adsp.mbn",
701 "qcom/sm8650/adsp_dtb.mbn";
707 firmware-name = "qcom/sm8650/cdsp.mbn",
708 "qcom/sm8650/cdsp_dtb.mbn";
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Dsm8650-qrd.dts10 #include "sm8650.dtsi"
21 model = "Qualcomm Technologies, Inc. SM8650 QRD";
22 compatible = "qcom,sm8650-qrd", "qcom,sm8650";
50 compatible = "qcom,sm8650-pmic-glink",
96 compatible = "qcom,sm8650-sndcard", "qcom,sm8450-sndcard";
97 model = "SM8650-QRD";
827 firmware-name = "qcom/sm8650/ipa_fws.mbn";
835 firmware-name = "qcom/sm8650/gen70900_zap.mbn";
1027 firmware-name = "qcom/sm8650/adsp.mbn",
1028 "qcom/sm8650/adsp_dtb.mbn";
[all …]
Dsm8650-hdk.dts10 #include "sm8650.dtsi"
20 model = "Qualcomm Technologies, Inc. SM8650 HDK";
21 compatible = "qcom,sm8650-hdk", "qcom,sm8650";
89 compatible = "qcom,sm8650-pmic-glink",
161 compatible = "qcom,sm8650-sndcard", "qcom,sm8450-sndcard";
162 model = "SM8650-HDK";
897 firmware-name = "qcom/sm8650/ipa_fws.mbn";
905 firmware-name = "qcom/sm8650/gen70900_zap.mbn";
1083 firmware-name = "qcom/sm8650/adsp.mbn",
1084 "qcom/sm8650/adsp_dtb.mbn";
[all …]
DMakefile265 sm8650-hdk-display-card-dtbs := sm8650-hdk.dtb sm8650-hdk-display-card.dtbo
267 dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk-display-card.dtb
268 dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk.dtb
269 dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb
270 dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb
/linux-6.12.1/drivers/clk/qcom/
Dtcsrcc-sm8650.c14 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
151 { .compatible = "qcom,sm8650-tcsr" },
164 .name = "tcsr_cc-sm8650",
181 MODULE_DESCRIPTION("QTI TCSRCC SM8650 Driver");
DMakefile117 obj-$(CONFIG_SM_CAMCC_8650) += camcc-sm8650.o
138 obj-$(CONFIG_SM_GCC_8650) += gcc-sm8650.o
149 obj-$(CONFIG_SM_GPUCC_8650) += gpucc-sm8650.o
151 obj-$(CONFIG_SM_TCSRCC_8650) += tcsrcc-sm8650.o
DKconfig872 tristate "SM8650 Camera Clock Controller"
876 Support for the camera clock controller on SM8650 devices.
965 SM8550 or SM8650 devices.
1067 tristate "SM8650 Global Clock Controller"
1071 Support for the global clock controller on SM8650 devices.
1166 tristate "SM8650 Graphics Clock Controller"
1170 Support for the graphics clock controller on SM8650 devices.
1183 tristate "SM8650 TCSR Clock Controller"
1187 Support for the TCSR clock controller on SM8650 devices.
/linux-6.12.1/drivers/interconnect/qcom/
Dsm8650.c13 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
18 #include "sm8650.h"
1633 { .compatible = "qcom,sm8650-aggre1-noc", .data = &sm8650_aggre1_noc },
1634 { .compatible = "qcom,sm8650-aggre2-noc", .data = &sm8650_aggre2_noc },
1635 { .compatible = "qcom,sm8650-clk-virt", .data = &sm8650_clk_virt },
1636 { .compatible = "qcom,sm8650-config-noc", .data = &sm8650_config_noc },
1637 { .compatible = "qcom,sm8650-cnoc-main", .data = &sm8650_cnoc_main },
1638 { .compatible = "qcom,sm8650-gem-noc", .data = &sm8650_gem_noc },
1639 { .compatible = "qcom,sm8650-lpass-ag-noc", .data = &sm8650_lpass_ag_noc },
1640 { .compatible = "qcom,sm8650-lpass-lpiaon-noc", .data = &sm8650_lpass_lpiaon_noc },
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DMakefile39 qnoc-sm8650-objs := sm8650.o
76 obj-$(CONFIG_INTERCONNECT_QCOM_SM8650) += qnoc-sm8650.o
/linux-6.12.1/drivers/pinctrl/qcom/
Dpinctrl-sm8650-lpass-lpi.c213 .compatible = "qcom,sm8650-lpass-lpi-pinctrl",
222 .name = "qcom-sm8650-lpass-lpi-pinctrl",
230 MODULE_DESCRIPTION("Qualcomm SM8650 LPI GPIO pin control driver");

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