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/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/
Dqcom,sm8150-pas.yaml7 title: Qualcomm SM8150/SM8250 Peripheral Authentication Service
13 Qualcomm SM8150/SM8250 SoC Peripheral Authentication Service loads and boots
23 - qcom,sm8250-adsp-pas
24 - qcom,sm8250-cdsp-pas
25 - qcom,sm8250-slpi-pas
66 - qcom,sm8250-adsp-pas
67 - qcom,sm8250-cdsp-pas
68 - qcom,sm8250-slpi-pas
88 - qcom,sm8250-cdsp-pas
119 - qcom,sm8250-adsp-pas
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/interconnect/
Dqcom,rpmh.yaml82 - qcom,sm8250-aggre1-noc
83 - qcom,sm8250-aggre2-noc
84 - qcom,sm8250-compute-noc
85 - qcom,sm8250-config-noc
86 - qcom,sm8250-dc-noc
87 - qcom,sm8250-gem-noc
88 - qcom,sm8250-mc-virt
89 - qcom,sm8250-mmss-noc
90 - qcom,sm8250-npu-noc
91 - qcom,sm8250-qup-virt
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/msm/
Dqcom,sm8250-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-mdss.yaml#
7 title: Qualcomm SM8250 Display MDSS
15 bindings of MDSS are mentioned for SM8250 target.
21 const: qcom,sm8250-mdss
53 const: qcom,sm8250-dpu
62 - const: qcom,sm8250-dp
72 - const: qcom,sm8250-dsi-ctrl
90 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
91 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
94 #include <dt-bindings/interconnect/qcom,sm8250.h>
[all …]
Dqcom,sm8250-dpu.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml#
7 title: Qualcomm SM8250 Display DPU
16 const: qcom,sm8250-dpu
53 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
54 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
56 #include <dt-bindings/interconnect/qcom,sm8250.h>
60 compatible = "qcom,sm8250-dpu";
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dqcom,camcc-sm8250.yaml4 $id: http://devicetree.org/schemas/clock/qcom,camcc-sm8250.yaml#
7 title: Qualcomm Camera Clock & Reset Controller on SM8250
14 power domains on SM8250.
16 See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h
23 const: qcom,sm8250-camcc
60 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
63 compatible = "qcom,sm8250-camcc";
Dqcom,gcc-sm8250.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM8250
15 domains on SM8250.
17 See also:: include/dt-bindings/clock/qcom,gcc-sm8250.h
21 const: qcom,gcc-sm8250
50 compatible = "qcom,gcc-sm8250";
Dqcom,audiocc-sm8250.yaml4 $id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
7 title: LPASS Audio Clock Controller on SM8250 SoCs
15 See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list
20 const: qcom,sm8250-lpass-audiocc
51 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
55 compatible = "qcom,sm8250-lpass-audiocc";
Dqcom,aoncc-sm8250.yaml4 $id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
7 title: LPASS Always ON Clock Controller on SM8250 SoCs
15 See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
20 const: qcom,sm8250-lpass-aoncc
51 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
55 compatible = "qcom,sm8250-lpass-aoncc";
Dqcom,dispcc-sm8x50.yaml7 title: Qualcomm Display Clock & Reset Controller on SM8150/SM8250/SM8350
14 domains on SM8150/SM8250/SM8350.
18 include/dt-bindings/clock/qcom,dispcc-sm8250.h
26 - qcom,sm8250-dispcc
101 compatible = "qcom,sm8250-dispcc";
Dqcom,videocc.yaml21 include/dt-bindings/clock/qcom,videocc-sm8250.h
30 - qcom,sm8250-videocc
110 - qcom,sm8250-videocc
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dqcom,sm8250-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8250 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8250 SoC.
18 const: qcom,sm8250-lpass-lpi-pinctrl
36 - $ref: "#/$defs/qcom-sm8250-lpass-state"
39 $ref: "#/$defs/qcom-sm8250-lpass-state"
43 qcom-sm8250-lpass-state:
87 compatible = "qcom,sm8250-lpass-lpi-pinctrl";
Dqcom,sm8250-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-pinctrl.yaml#
7 title: Qualcomm Technologies, Inc. SM8250 TLMM block
13 Top Level Mode Multiplexer pin controller in the Qualcomm SM8250 SoC.
17 const: qcom,sm8250-pinctrl
41 - $ref: "#/$defs/qcom-sm8250-tlmm-state"
44 $ref: "#/$defs/qcom-sm8250-tlmm-state"
48 qcom-sm8250-tlmm-state:
108 compatible = "qcom,sm8250-pinctrl";
/linux-6.12.1/Documentation/devicetree/bindings/media/
Dqcom,sm8250-venus.yaml4 $id: http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#
7 title: Qualcomm SM8250 Venus video encode and decode accelerators
21 const: qcom,sm8250-venus
106 #include <dt-bindings/clock/qcom,videocc-sm8250.h>
107 #include <dt-bindings/interconnect/qcom,sm8250.h>
108 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
112 compatible = "qcom,sm8250-venus";
Dqcom,sm8250-camss.yaml5 $id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#
18 const: qcom,sm8250-camss
296 #include <dt-bindings/clock/qcom,camcc-sm8250.h>
297 #include <dt-bindings/interconnect/qcom,sm8250.h>
298 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
306 compatible = "qcom,sm8250-camss";
/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dqcom,pcie-sm8250.yaml4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8250.yaml#
7 title: Qualcomm SM8250 PCI Express Root Complex
14 Qualcomm SM8250 SoC PCIe root complex controller is based on the Synopsys
19 const: qcom,pcie-sm8250
91 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
93 #include <dt-bindings/interconnect/qcom,sm8250.h>
101 compatible = "qcom,pcie-sm8250";
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dqcom,lpass-wsa-macro.yaml17 - qcom,sm8250-lpass-wsa-macro
67 - qcom,sm8250-lpass-wsa-macro
105 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
108 compatible = "qcom,sm8250-lpass-wsa-macro";
Dqcom,lpass-rx-macro.yaml17 - qcom,sm8250-lpass-rx-macro
87 - qcom,sm8250-lpass-rx-macro
126 compatible = "qcom,sm8250-lpass-rx-macro";
/linux-6.12.1/Documentation/devicetree/bindings/regulator/
Dqcom,sdm845-refgen-regulator.yaml36 - const: qcom,sm8250-refgen-regulator
40 - qcom,sm8250-refgen-regulator
54 compatible = "qcom,sm8250-refgen-regulator";
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dqcom,sc8280xp-qmp-pcie-phy.yaml31 - qcom,sm8250-qmp-gen3x1-pcie-phy
32 - qcom,sm8250-qmp-gen3x2-pcie-phy
33 - qcom,sm8250-qmp-modem-pcie-phy
147 - qcom,sm8250-qmp-gen3x1-pcie-phy
148 - qcom,sm8250-qmp-gen3x2-pcie-phy
149 - qcom,sm8250-qmp-modem-pcie-phy
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm8250.dtsi7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
14 #include <dt-bindings/interconnect/qcom,sm8250.h>
23 #include <dt-bindings/clock/qcom,camcc-sm8250.h>
24 #include <dt-bindings/clock/qcom,videocc-sm8250.h>
374 compatible = "qcom,sm8250-qup-virt";
671 compatible = "qcom,scm-sm8250", "qcom,scm";
948 compatible = "qcom,gcc-sm8250";
962 compatible = "qcom,sm8250-ipcc", "qcom,ipcc";
[all …]
Dsm8250-xiaomi-pipa.dts11 #include "sm8250.dtsi"
18 * Delete following upstream (sm8250.dtsi) reserved
30 compatible = "xiaomi,pipa", "qcom,sm8250";
35 qcom,msm-id = <QCOM_ID_SM8250 0x20001>; /* SM8250 v2.1 */
165 firmware-name = "qcom/sm8250/xiaomi/pipa/adsp.mbn";
469 firmware-name = "qcom/sm8250/xiaomi/pipa/cdsp.mbn";
494 firmware-name = "qcom/sm8250/xiaomi/pipa/a650_zap.mbn";
579 firmware-name = "qcom/sm8250/xiaomi/pipa/slpi.mbn";
621 firmware-name = "qcom/sm8250/xiaomi/pipa/venus.mbn";
/linux-6.12.1/sound/soc/qcom/
Dsm8250.c17 #define DRIVER_NAME "sm8250"
176 {.compatible = "qcom,sm8250-sndcard"},
187 .name = "snd-sm8250",
193 MODULE_DESCRIPTION("SM8250 ASoC Machine Driver");
DMakefile28 snd-soc-sm8250-y := sm8250.o
41 obj-$(CONFIG_SND_SOC_SM8250) += snd-soc-sm8250.o
/linux-6.12.1/drivers/clk/qcom/
Dlpass-gfm-sm8250.c20 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
21 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
293 .compatible = "qcom,sm8250-lpass-aoncc",
297 .compatible = "qcom,sm8250-lpass-audiocc",
318 MODULE_DESCRIPTION("QTI SM8250 LPASS Glitch Free Mux clock driver");
DMakefile23 obj-$(CONFIG_CLK_GFM_LPASS_SM8250) += lpass-gfm-sm8250.o
114 obj-$(CONFIG_SM_CAMCC_8250) += camcc-sm8250.o
124 obj-$(CONFIG_SM_DISPCC_8250) += dispcc-sm8250.o
134 obj-$(CONFIG_SM_GCC_8250) += gcc-sm8250.o
145 obj-$(CONFIG_SM_GPUCC_8250) += gpucc-sm8250.o
154 obj-$(CONFIG_SM_VIDEOCC_8250) += videocc-sm8250.o

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