| /linux-6.12.1/Documentation/devicetree/bindings/interconnect/ |
| D | qcom,sm6115.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6115.yaml#
7 title: Qualcomm SM6115 Network-On-Chip interconnect
13 The Qualcomm SM6115 interconnect providers support adjusting the
19 - qcom,sm6115-bimc
20 - qcom,sm6115-cnoc
21 - qcom,sm6115-snoc
47 - qcom,sm6115-clk-virt
48 - qcom,sm6115-mmrt-virt
49 - qcom,sm6115-mmnrt-virt
65 const: qcom,sm6115-cnoc
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,sm6115-pas.yaml | 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm6115-pas.yaml#
7 title: Qualcomm SM6115 Peripheral Authentication Service
13 Qualcomm SM6115 SoC Peripheral Authentication Service loads and boots
20 - qcom,sm6115-adsp-pas
21 - qcom,sm6115-cdsp-pas
22 - qcom,sm6115-mpss-pas
26 - const: qcom,sm6115-adsp-pas
30 - const: qcom,sm6115-mpss-pas
65 - qcom,sm6115-adsp-pas
66 - qcom,sm6115-cdsp-pas
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | qcom,sm6115-dispcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-dispcc.yaml#
7 title: Qualcomm Display Clock Controller for SM6115
14 on SM6115.
16 See also:: include/dt-bindings/clock/qcom,sm6115-dispcc.h
21 - qcom,sm6115-dispcc
44 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
46 compatible = "qcom,sm6115-dispcc";
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| D | qcom,sm6115-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM6115
16 See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
21 - qcom,sm6115-gpucc
40 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
48 compatible = "qcom,sm6115-gpucc";
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| D | qcom,gcc-sm6115.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6115.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM6115 and SM4250
16 See also:: include/dt-bindings/clock/qcom,gcc-sm6115.h
20 const: qcom,gcc-sm6115
47 compatible = "qcom,gcc-sm6115";
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| D | qcom,rpmcc.yaml | 46 - qcom,rpmcc-sm6115
123 - qcom,rpmcc-sm6115
|
| /linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,sm6115-lpass-lpi-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
19 const: qcom,sm6115-lpass-lpi-pinctrl
37 - $ref: "#/$defs/qcom-sm6115-lpass-state"
40 $ref: "#/$defs/qcom-sm6115-lpass-state"
44 qcom-sm6115-lpass-state:
86 compatible = "qcom,sm6115-lpass-lpi-pinctrl";
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| D | qcom,sm6115-tlmm.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM6115, SM4250 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM4250 and SM6115
18 const: qcom,sm6115-tlmm
37 - $ref: "#/$defs/qcom-sm6115-tlmm-state"
40 $ref: "#/$defs/qcom-sm6115-tlmm-state"
44 qcom-sm6115-tlmm-state:
100 compatible = "qcom,sm6115-tlmm";
|
| /linux-6.12.1/Documentation/devicetree/bindings/display/msm/ |
| D | qcom,sm6115-mdss.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml#
7 title: Qualcomm SM6115 Display MDSS
15 are mentioned for SM6115 target.
21 const: qcom,sm6115-mdss
49 const: qcom,sm6115-dpu
59 - const: qcom,sm6115-dsi-ctrl
80 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
81 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
89 compatible = "qcom,sm6115-mdss";
106 compatible = "qcom,sm6115-dpu";
[all …]
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| D | qcom,sm6115-dpu.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml#
7 title: Qualcomm Display DPU on SM6115
16 const: qcom,sm6115-dpu
57 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
58 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
62 compatible = "qcom,sm6115-dpu";
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| /linux-6.12.1/arch/arm64/boot/dts/qcom/ |
| D | sm6115.dtsi | 6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
14 #include <dt-bindings/interconnect/qcom,sm6115.h>
268 compatible = "qcom,scm-sm6115", "qcom,scm";
369 compatible = "qcom,sm6115-rpm-proc", "qcom,rpm-proc";
379 compatible = "qcom,rpm-sm6115", "qcom,glink-smd-rpm";
383 compatible = "qcom,rpmcc-sm6115", "qcom,rpmcc";
390 compatible = "qcom,sm6115-rpmpd";
619 compatible = "qcom,sm6115-tcsr", "syscon";
[all …]
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| D | sm6115p-lenovo-j606f.dts | 8 #include "sm6115.dtsi"
13 compatible = "lenovo,j606f", "qcom,sm6115p", "qcom,sm6115";
72 firmware-name = "qcom/sm6115/LENOVO/J606F/a610_zap.mbn";
133 firmware-name = "qcom/sm6115/LENOVO/J606F/adsp.mbn";
138 firmware-name = "qcom/sm6115/LENOVO/J606F/cdsp.mbn";
143 firmware-name = "qcom/sm6115/LENOVO/J606F/modem.mbn";
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| D | sm6115-fxtec-pro1x.dts | 8 #include "sm6115.dtsi"
17 compatible = "fxtec,pro1x", "qcom,sm6115";
126 firmware-name = "qcom/sm6115/Fxtec/QX1050/a610_zap.mbn";
295 firmware-name = "qcom/sm6115/Fxtec/QX1050/adsp.mbn";
300 firmware-name = "qcom/sm6115/Fxtec/QX1050/cdsp.mbn";
305 firmware-name = "qcom/sm6115/Fxtec/QX1050/modem.mbn";
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| /linux-6.12.1/drivers/interconnect/qcom/ |
| D | Makefile | 31 qnoc-sm6115-objs := sm6115.o
68 obj-$(CONFIG_INTERCONNECT_QCOM_SM6115) += qnoc-sm6115.o
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| D | sm6115.c | 8 #include <dt-bindings/interconnect/qcom,sm6115.h>
1393 { .compatible = "qcom,sm6115-bimc", .data = &sm6115_bimc },
1394 { .compatible = "qcom,sm6115-clk-virt", .data = &sm6115_clk_virt },
1395 { .compatible = "qcom,sm6115-cnoc", .data = &sm6115_config_noc },
1396 { .compatible = "qcom,sm6115-mmrt-virt", .data = &sm6115_mmrt_virt },
1397 { .compatible = "qcom,sm6115-mmnrt-virt", .data = &sm6115_mmnrt_virt },
1398 { .compatible = "qcom,sm6115-snoc", .data = &sm6115_sys_noc },
1407 .name = "qnoc-sm6115",
1425 MODULE_DESCRIPTION("SM6115 NoC driver");
|
| /linux-6.12.1/drivers/pinctrl/qcom/ |
| D | pinctrl-sm6115-lpass-lpi.c | 139 { .compatible = "qcom,sm6115-lpass-lpi-pinctrl", .data = &sm6115_lpi_data },
146 .name = "qcom-sm6115-lpass-lpi-pinctrl",
154 MODULE_DESCRIPTION("QTI SM6115 LPI GPIO pin control driver");
|
| D | Kconfig | 81 tristate "Qualcomm Technologies Inc SM6115 LPASS LPI pin controller driver"
87 (Low Power Island) found on the Qualcomm Technologies Inc SM6115 platform.
|
| D | Makefile | 48 obj-$(CONFIG_PINCTRL_SM6115) += pinctrl-sm6115.o
49 obj-$(CONFIG_PINCTRL_SM6115_LPASS_LPI) += pinctrl-sm6115-lpass-lpi.o
|
| /linux-6.12.1/Documentation/devicetree/bindings/crypto/ |
| D | qcom-qce.yaml | 41 - qcom,sm6115-qce
124 - qcom,sm6115-qce
|
| /linux-6.12.1/Documentation/devicetree/bindings/sound/ |
| D | qcom,lpass-tx-macro.yaml | 17 - qcom,sm6115-lpass-tx-macro
111 - qcom,sm6115-lpass-tx-macro
|
| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | qcom,msm8998-qmp-usb3-phy.yaml | 22 - qcom,sm6115-qmp-usb3-phy
117 - qcom,sm6115-qmp-usb3-phy
|
| D | qcom,sc8280xp-qmp-ufs-phy.yaml | 27 - qcom,sm6115-qmp-ufs-phy
94 - qcom,sm6115-qmp-ufs-phy
|
| /linux-6.12.1/drivers/clk/qcom/ |
| D | gpucc-sm6115.c | 13 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
468 { .compatible = "qcom,sm6115-gpucc" },
497 .name = "sm6115-gpucc",
503 MODULE_DESCRIPTION("QTI GPU_CC SM6115 Driver");
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| D | Makefile | 119 obj-$(CONFIG_SM_DISPCC_6115) += dispcc-sm6115.o
128 obj-$(CONFIG_SM_GCC_6115) += gcc-sm6115.o
140 obj-$(CONFIG_SM_GPUCC_6115) += gpucc-sm6115.o
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| D | dispcc-sm6115.c | 15 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
570 { .compatible = "qcom,sm6115-dispcc" },
601 .name = "dispcc-sm6115",
607 MODULE_DESCRIPTION("Qualcomm SM6115 Display Clock controller");
|