Searched full:rstgen (Results 1 – 7 of 7) sorted by relevance
220 resets = <&rstgen JH7100_RSTN_GMAC_AHB>;250 rstgen: reset-controller@11840000 { label267 resets = <&rstgen JH7100_RSTN_I2C0_APB>;280 resets = <&rstgen JH7100_RSTN_I2C1_APB>;293 resets = <&rstgen JH7100_RSTN_GPIO_APB>;307 resets = <&rstgen JH7100_RSTN_UART2_APB>;320 resets = <&rstgen JH7100_RSTN_UART3_APB>;333 resets = <&rstgen JH7100_RSTN_I2C2_APB>;346 resets = <&rstgen JH7100_RSTN_I2C3_APB>;359 resets = <&rstgen JH7100_RSTN_WDTIMER_APB>,[all …]
67 resets = <&rstgen JH7100_RSTN_TEMP_SENSE>,68 <&rstgen JH7100_RSTN_TEMP_APB>;
15 Tegra's clocks, and setting their rates. It comprises CLKGEN and RSTGEN units.25 RSTGEN provides the registers needed to control resetting of each block in
59 resets = <&rstgen RST_I2C0>;72 resets = <&rstgen RST_I2C1>;85 resets = <&rstgen RST_I2C2>;98 resets = <&rstgen RST_I2C3>;501 rstgen: reset-controller@7030013000 { label517 resets = <&rstgen RST_UART0>;
31 rstgen: reset-controller@c00 {
54 resets = <&rstgen 109>;