| /linux-6.12.1/include/linux/phy/ |
| D | phy.h | 3 * phy.h -- generic phy header file
19 #include <linux/phy/phy-dp.h>
20 #include <linux/phy/phy-lvds.h>
21 #include <linux/phy/phy-mipi-dphy.h>
23 struct phy;
55 * union phy_configure_opts - Opaque generic phy configuration
58 * the MIPI_DPHY phy mode.
62 * the LVDS phy mode.
71 * struct phy_ops - set of function pointers for performing phy operations
72 * @init: operation to be performed for initializing phy
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| /linux-6.12.1/drivers/phy/ |
| D | phy-core.c | 3 * phy-core.c -- Generic Phy framework.
18 #include <linux/phy/phy.h>
25 .name = "phy",
37 struct phy *phy = *(struct phy **)res; in devm_phy_release() local
39 phy_put(dev, phy); in devm_phy_release()
51 struct phy *phy = *(struct phy **)res; in devm_phy_consume() local
53 phy_destroy(phy); in devm_phy_consume()
58 struct phy **phy = res; in devm_phy_match() local
60 return *phy == match_data; in devm_phy_match()
64 * phy_create_lookup() - allocate and register PHY/device association
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| D | Kconfig | 3 # PHY
6 menu "PHY Subsystem"
9 bool "PHY Core"
11 Generic PHY support.
13 This framework is designed to provide a generic interface for PHY
15 API by which phy drivers can create PHY using the phy framework and
16 phy users can obtain reference to the PHY. All the users of this
23 Generic MIPI D-PHY support.
25 Provides a number of helpers a core functions for MIPI D-PHY
29 tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver"
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| /linux-6.12.1/Documentation/translations/zh_CN/driver-api/phy/ |
| D | phy.rst | 4 :Original: Documentation/driver-api/phy/phy.rst
16 本文档解释了 PHY 的通用框架和提供的API，以及使用方法。
21 *PHY* 是物理层的缩写，它被用来把设备连接到一个物理媒介，例如USB控制器
22 有一个提供序列化、反序列化、编码、解码和负责获取所需的数据传输速率的 PHY。
23 注意，有些USB控制器内嵌了 PHY 的功能，其它的则使用了一个外置的PHY，此外
24 使用 PHY 的设备还有无线网、以太网、SATA等（控制器）。
26 创建这个框架的目的是将遍布 Linux 内核的 PHY 驱动程序融入到 drivers/phy，
29 该框架仅适用于使用外部 PHY（PHY 功能未嵌入控制器内）的设备。
34 PHY provider是指实现一个或多个 PHY 实例的实体。对于 PHY provider 仅
35 实现单个 PHY 实例的简单情况，框架在 of_phy_simple_xlate 中提供其自己
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| /linux-6.12.1/drivers/scsi/libsas/ |
| D | sas_phy.c | 3 * Serial Attached SCSI (SAS) Phy class
15 /* ---------- Phy events ---------- */
20 struct asd_sas_phy *phy = ev->phy; in sas_phye_loss_of_signal() local
22 phy->error = 0; in sas_phye_loss_of_signal()
23 sas_deform_port(phy, 1); in sas_phye_loss_of_signal()
29 struct asd_sas_phy *phy = ev->phy; in sas_phye_oob_done() local
31 phy->error = 0; in sas_phye_oob_done()
37 struct asd_sas_phy *phy = ev->phy; in sas_phye_oob_error() local
38 struct sas_ha_struct *sas_ha = phy->ha; in sas_phye_oob_error()
39 struct asd_sas_port *port = phy->port; in sas_phye_oob_error()
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| /linux-6.12.1/drivers/net/ |
| D | sungem_phy.c | 3 * PHY drivers for the sungem ethernet driver.
35 /* Link modes of the BCM5400 PHY */
47 static inline int __sungem_phy_read(struct mii_phy* phy, int id, int reg) in __sungem_phy_read() argument
49 return phy->mdio_read(phy->dev, id, reg); in __sungem_phy_read()
52 static inline void __sungem_phy_write(struct mii_phy* phy, int id, int reg, int val) in __sungem_phy_write() argument
54 phy->mdio_write(phy->dev, id, reg, val); in __sungem_phy_write()
57 static inline int sungem_phy_read(struct mii_phy* phy, int reg) in sungem_phy_read() argument
59 return phy->mdio_read(phy->dev, phy->mii_id, reg); in sungem_phy_read()
62 static inline void sungem_phy_write(struct mii_phy* phy, int reg, int val) in sungem_phy_write() argument
64 phy->mdio_write(phy->dev, phy->mii_id, reg, val); in sungem_phy_write()
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| /linux-6.12.1/drivers/net/ethernet/ibm/emac/ |
| D | phy.c | 3 * drivers/net/ethernet/ibm/emac/phy.c
5 * Driver for PowerPC 4xx on-chip ethernet controller, PHY support.
30 #include "phy.h"
35 static inline int _phy_read(struct mii_phy *phy, int reg) in _phy_read() argument
37 return phy->mdio_read(phy->dev, phy->address, reg); in _phy_read()
40 static inline void _phy_write(struct mii_phy *phy, int reg, int val) in _phy_write() argument
42 phy->mdio_write(phy->dev, phy->address, reg, val); in _phy_write()
45 static inline int gpcs_phy_read(struct mii_phy *phy, int reg) in gpcs_phy_read() argument
47 return phy->mdio_read(phy->dev, phy->gpcs_address, reg); in gpcs_phy_read()
50 static inline void gpcs_phy_write(struct mii_phy *phy, int reg, int val) in gpcs_phy_write() argument
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| /linux-6.12.1/drivers/phy/hisilicon/ |
| D | phy-hi3670-pcie.c | 3 * PCIe phy driver for Kirin 970
25 #include <linux/phy/phy.h>
44 /* PCIe PHY registers */
168 static inline void hi3670_apb_phy_writel(struct hi3670_pcie_phy *phy, u32 val, in hi3670_apb_phy_writel() argument
171 writel(val, phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_writel()
174 static inline u32 hi3670_apb_phy_readl(struct hi3670_pcie_phy *phy, u32 reg) in hi3670_apb_phy_readl() argument
176 return readl(phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_readl()
179 static inline void hi3670_apb_phy_updatel(struct hi3670_pcie_phy *phy, in hi3670_apb_phy_updatel() argument
184 regval = hi3670_apb_phy_readl(phy, reg); in hi3670_apb_phy_updatel()
187 hi3670_apb_phy_writel(phy, regval, reg); in hi3670_apb_phy_updatel()
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| /linux-6.12.1/drivers/phy/ralink/ |
| D | phy-ralink-usb.c | 17 #include <linux/phy/phy.h>
56 struct phy *phy; member
61 static void u2_phy_w32(struct ralink_usb_phy *phy, u32 val, u32 reg) in u2_phy_w32() argument
63 writel(val, phy->base + reg); in u2_phy_w32()
66 static u32 u2_phy_r32(struct ralink_usb_phy *phy, u32 reg) in u2_phy_r32() argument
68 return readl(phy->base + reg); in u2_phy_r32()
71 static void ralink_usb_phy_init(struct ralink_usb_phy *phy) in ralink_usb_phy_init() argument
73 u2_phy_r32(phy, OFS_U2_PHY_AC2); in ralink_usb_phy_init()
74 u2_phy_r32(phy, OFS_U2_PHY_ACR0); in ralink_usb_phy_init()
75 u2_phy_r32(phy, OFS_U2_PHY_DCR0); in ralink_usb_phy_init()
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| D | phy-mt7621-pci.c | 3 * Mediatek MT7621 PCI PHY Driver
7 #include <dt-bindings/phy/phy.h>
13 #include <linux/phy/phy.h>
66 * struct mt7621_pci_phy - Mt7621 Pcie PHY core
69 * @phy: pointer to the kernel PHY device
72 * @has_dual_port: if the phy has dual ports.
79 struct phy *phy; member
86 static inline void mt7621_phy_rmw(struct mt7621_pci_phy *phy, in mt7621_phy_rmw() argument
98 regmap_read(phy->regmap, reg, &val); in mt7621_phy_rmw()
101 regmap_write(phy->regmap, reg, val); in mt7621_phy_rmw()
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| /linux-6.12.1/Documentation/driver-api/phy/ |
| D | phy.rst | 2 PHY subsystem
7 This document explains the Generic PHY Framework along with the APIs provided,
13 *PHY* is the abbreviation for physical layer. It is used to connect a device
14 to the physical medium e.g., the USB controller has a PHY to provide functions
17 controllers have PHY functionality embedded into it and others use an external
18 PHY. Other peripherals that use PHY include Wireless LAN, Ethernet,
21 The intention of creating this framework is to bring the PHY drivers spread
22 all over the Linux kernel to drivers/phy to increase code re-use and for
25 This framework will be of use only to devices that use external PHY (PHY
28 Registering/Unregistering the PHY provider
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| /linux-6.12.1/drivers/net/phy/ |
| D | phy_led_triggers.c | 4 #include <linux/phy.h>
8 static struct phy_led_trigger *phy_speed_to_led_trigger(struct phy_device *phy, in phy_speed_to_led_trigger() argument
13 for (i = 0; i < phy->phy_num_led_triggers; i++) { in phy_speed_to_led_trigger()
14 if (phy->phy_led_triggers[i].speed == speed) in phy_speed_to_led_trigger()
15 return &phy->phy_led_triggers[i]; in phy_speed_to_led_trigger()
20 static void phy_led_trigger_no_link(struct phy_device *phy) in phy_led_trigger_no_link() argument
22 if (phy->last_triggered) { in phy_led_trigger_no_link()
23 led_trigger_event(&phy->last_triggered->trigger, LED_OFF); in phy_led_trigger_no_link()
24 led_trigger_event(&phy->led_link_trigger->trigger, LED_OFF); in phy_led_trigger_no_link()
25 phy->last_triggered = NULL; in phy_led_trigger_no_link()
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| /linux-6.12.1/drivers/phy/ti/ |
| D | phy-omap-usb2.c | 3 * omap-usb2.c - USB PHY, talking to USB controller on TI SoCs.
17 #include <linux/phy/omap_control_phy.h>
18 #include <linux/phy/omap_usb.h>
19 #include <linux/phy/phy.h>
55 struct usb_phy phy; member
71 #define phy_to_omapusb(x) container_of((x), struct omap_usb, phy)
93 * omap_usb2_set_comparator() - links the comparator present in the system with this phy
95 * @comparator: the companion phy(comparator) for this phy
97 * The phy companion driver should call this API passing the phy_companion
98 * filled with set_vbus and start_srp to be used by usb phy.
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| D | phy-dm816x-usb.c | 15 #include <linux/phy/phy.h>
22 * phy as being SR70LX Synopsys USB 2.0 OTG nanoPHY. It also seems at
32 * Finally, the phy on dm814x and am335x is different from dm816x.
35 #define DM816X_USB_CTRL_PHYSLEEP1 BIT(1) /* Enable the first phy */
36 #define DM816X_USB_CTRL_PHYSLEEP0 BIT(0) /* Enable the second phy */
47 struct usb_phy phy; member
71 static int dm816x_usb_phy_init(struct phy *x) in dm816x_usb_phy_init()
73 struct dm816x_usb_phy *phy = phy_get_drvdata(x); in dm816x_usb_phy_init() local
76 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init()
77 dev_warn(phy->dev, "nonstandard phy refclk\n"); in dm816x_usb_phy_init()
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| D | phy-ti-pipe3.c | 3 * phy-ti-pipe3 - PIPE3 PHY driver.
13 #include <linux/phy/phy.h>
20 #include <linux/phy/omap_control_phy.h>
300 static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy) in ti_pipe3_get_dpll_params() argument
303 struct pipe3_dpll_map *dpll_map = phy->dpll_map; in ti_pipe3_get_dpll_params()
305 rate = clk_get_rate(phy->sys_clk); in ti_pipe3_get_dpll_params()
312 dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate); in ti_pipe3_get_dpll_params()
317 static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy);
318 static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy);
320 static int ti_pipe3_power_off(struct phy *x) in ti_pipe3_power_off()
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| /linux-6.12.1/drivers/media/platform/ti/cal/ |
| D | cal-camerarx.c | 33 static inline u32 camerarx_read(struct cal_camerarx *phy, u32 offset) in camerarx_read() argument
35 return ioread32(phy->base + offset); in camerarx_read()
38 static inline void camerarx_write(struct cal_camerarx *phy, u32 offset, u32 val) in camerarx_write() argument
40 iowrite32(val, phy->base + offset); in camerarx_write()
48 static s64 cal_camerarx_get_ext_link_freq(struct cal_camerarx *phy) in cal_camerarx_get_ext_link_freq() argument
50 struct v4l2_mbus_config_mipi_csi2 *mipi_csi2 = &phy->endpoint.bus.mipi_csi2; in cal_camerarx_get_ext_link_freq()
58 state = v4l2_subdev_get_locked_active_state(&phy->subdev); in cal_camerarx_get_ext_link_freq()
68 freq = v4l2_get_link_freq(phy->source->ctrl_handler, bpp, 2 * num_lanes); in cal_camerarx_get_ext_link_freq()
70 phy_err(phy, "failed to get link freq for subdev '%s'\n", in cal_camerarx_get_ext_link_freq()
71 phy->source->name); in cal_camerarx_get_ext_link_freq()
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| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_combo_phy.c | 55 icl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy) in icl_get_procmon_ref_values() argument
59 val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy)); in icl_get_procmon_ref_values()
78 enum phy phy) in icl_set_procmon_ref_values() argument
82 procmon = icl_get_procmon_ref_values(dev_priv, phy); in icl_set_procmon_ref_values()
84 intel_de_rmw(dev_priv, ICL_PORT_COMP_DW1(phy), in icl_set_procmon_ref_values()
87 intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9); in icl_set_procmon_ref_values()
88 intel_de_write(dev_priv, ICL_PORT_COMP_DW10(phy), procmon->dw10); in icl_set_procmon_ref_values()
92 enum phy phy, i915_reg_t reg, u32 mask, in check_phy_reg() argument
99 "Combo PHY %c reg %08x state mismatch: " in check_phy_reg()
101 phy_name(phy), in check_phy_reg()
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| D | intel_combo_phy_regs.h | 17 #define _ICL_COMBOPHY(phy) _PICK(phy, _ICL_COMBOPHY_A, \ argument
24 #define _ICL_PORT_CL_DW(dw, phy) (_ICL_COMBOPHY(phy) + \ argument
27 #define ICL_PORT_CL_DW5(phy) _MMIO(_ICL_PORT_CL_DW(5, phy)) argument
31 #define ICL_PORT_CL_DW10(phy) _MMIO(_ICL_PORT_CL_DW(10, phy)) argument
46 #define ICL_PORT_CL_DW12(phy) _MMIO(_ICL_PORT_CL_DW(12, phy)) argument
51 #define _ICL_PORT_COMP_DW(dw, phy) (_ICL_COMBOPHY(phy) + \ argument
54 #define ICL_PORT_COMP_DW0(phy) _MMIO(_ICL_PORT_COMP_DW(0, phy)) argument
57 #define ICL_PORT_COMP_DW1(phy) _MMIO(_ICL_PORT_COMP_DW(1, phy)) argument
59 #define ICL_PORT_COMP_DW3(phy) _MMIO(_ICL_PORT_COMP_DW(3, phy)) argument
69 #define ICL_PORT_COMP_DW8(phy) _MMIO(_ICL_PORT_COMP_DW(8, phy)) argument
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| /linux-6.12.1/drivers/phy/allwinner/ |
| D | phy-sun9i-usb.c | 3 * Allwinner sun9i USB phy driver
7 * Based on phy-sun4i-usb.c from
18 #include <linux/phy/phy.h>
36 struct phy *phy; member
44 static void sun9i_usb_phy_passby(struct sun9i_usb_phy *phy, int enable) in sun9i_usb_phy_passby() argument
52 if (phy->type == USBPHY_INTERFACE_MODE_HSIC) in sun9i_usb_phy_passby()
56 reg_value = readl(phy->pmu); in sun9i_usb_phy_passby()
63 writel(reg_value, phy->pmu); in sun9i_usb_phy_passby()
66 static int sun9i_usb_phy_init(struct phy *_phy) in sun9i_usb_phy_init()
68 struct sun9i_usb_phy *phy = phy_get_drvdata(_phy); in sun9i_usb_phy_init() local
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| /linux-6.12.1/drivers/nfc/pn544/ |
| D | i2c.c | 186 static void pn544_hci_i2c_platform_init(struct pn544_i2c_phy *phy) in pn544_hci_i2c_platform_init() argument
192 nfc_info(&phy->i2c_dev->dev, "Detecting nfc_en polarity\n"); in pn544_hci_i2c_platform_init()
195 gpiod_set_value_cansleep(phy->gpiod_fw, 0); in pn544_hci_i2c_platform_init()
198 phy->en_polarity = polarity; in pn544_hci_i2c_platform_init()
202 gpiod_set_value_cansleep(phy->gpiod_en, !phy->en_polarity); in pn544_hci_i2c_platform_init()
206 gpiod_set_value_cansleep(phy->gpiod_en, phy->en_polarity); in pn544_hci_i2c_platform_init()
210 dev_dbg(&phy->i2c_dev->dev, "Sending reset cmd\n"); in pn544_hci_i2c_platform_init()
211 ret = i2c_master_send(phy->i2c_dev, rset_cmd, count); in pn544_hci_i2c_platform_init()
213 nfc_info(&phy->i2c_dev->dev, in pn544_hci_i2c_platform_init()
221 nfc_err(&phy->i2c_dev->dev, in pn544_hci_i2c_platform_init()
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| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | qcom,sc8280xp-qmp-pcie-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#
7 title: Qualcomm QMP PHY controller (PCIe, SC8280XP)
13 The QMP PHY controller supports physical layer functionality for a number of
19 - qcom,sa8775p-qmp-gen4x2-pcie-phy
20 - qcom,sa8775p-qmp-gen4x4-pcie-phy
21 - qcom,sc8180x-qmp-pcie-phy
22 - qcom,sc8280xp-qmp-gen3x1-pcie-phy
23 - qcom,sc8280xp-qmp-gen3x2-pcie-phy
24 - qcom,sc8280xp-qmp-gen3x4-pcie-phy
25 - qcom,sdm845-qhp-pcie-phy
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| D | qcom,sc8280xp-qmp-ufs-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml#
7 title: Qualcomm QMP PHY controller (UFS, SC8280XP)
13 The QMP PHY controller supports physical layer functionality for a number of
19 - qcom,msm8996-qmp-ufs-phy
20 - qcom,msm8998-qmp-ufs-phy
21 - qcom,sa8775p-qmp-ufs-phy
22 - qcom,sc7180-qmp-ufs-phy
23 - qcom,sc7280-qmp-ufs-phy
24 - qcom,sc8180x-qmp-ufs-phy
25 - qcom,sc8280xp-qmp-ufs-phy
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| /linux-6.12.1/drivers/net/ethernet/intel/igb/ |
| D | e1000_phy.c | 31 * igb_check_reset_block - Check if PHY reset is blocked
34 * Read the PHY management control register and check whether a PHY reset
48 * igb_get_phy_id - Retrieve the PHY ID and revision
51 * Reads the PHY registers and stores the PHY ID and possibly the PHY
56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id() local
60 /* ensure PHY page selection to fix misconfigured i210 */ in igb_get_phy_id()
62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id()
64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id()
70 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igb_get_phy_id()
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| /linux-6.12.1/arch/arm64/boot/dts/microchip/ |
| D | sparx5_pcb135_board.dtsi | 202 phy0: ethernet-phy@0 {
205 phy1: ethernet-phy@1 {
208 phy2: ethernet-phy@2 {
211 phy3: ethernet-phy@3 {
214 phy4: ethernet-phy@4 {
217 phy5: ethernet-phy@5 {
220 phy6: ethernet-phy@6 {
223 phy7: ethernet-phy@7 {
226 phy8: ethernet-phy@8 {
229 phy9: ethernet-phy@9 {
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| /linux-6.12.1/drivers/phy/starfive/ |
| D | phy-jh7110-usb.c | 3 * StarFive JH7110 USB 2.0 PHY driver
15 #include <linux/phy/phy.h>
28 struct phy *phy; member
36 static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set) in usb2_set_ls_keepalive() argument
41 val = readl(phy->regs + USB_LS_KEEPALIVE_OFF); in usb2_set_ls_keepalive()
47 writel(val, phy->regs + USB_LS_KEEPALIVE_OFF); in usb2_set_ls_keepalive()
50 static int usb2_phy_set_mode(struct phy *_phy, in usb2_phy_set_mode()
53 struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy); in usb2_phy_set_mode() local
64 if (mode != phy->mode) { in usb2_phy_set_mode()
65 dev_dbg(&_phy->dev, "Changing phy to %d\n", mode); in usb2_phy_set_mode()
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