| /linux-6.12.1/drivers/dma/ |
| D | xgene-dma.c | 216 struct xgene_dma *pdma; member
248 * @pdma: X-Gene DMA device structure reference
272 struct xgene_dma *pdma; member
344 static bool is_pq_enabled(struct xgene_dma *pdma) in is_pq_enabled() argument
348 val = ioread32(pdma->csr_efuse + XGENE_SOC_JTAG1_SHADOW); in is_pq_enabled()
1014 struct xgene_dma *pdma = (struct xgene_dma *)id; in xgene_dma_err_isr() local
1018 val = ioread32(pdma->csr_dma + XGENE_DMA_INT); in xgene_dma_err_isr()
1021 iowrite32(val, pdma->csr_dma + XGENE_DMA_INT); in xgene_dma_err_isr()
1026 dev_err(pdma->dev, in xgene_dma_err_isr()
1036 iowrite32(ring->num, ring->pdma->csr_ring + XGENE_DMA_RING_STATE); in xgene_dma_wr_ring_state()
[all …]
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| /linux-6.12.1/drivers/dma/sf-pdma/ |
| D | sf-pdma.c | 12 * - Chapter 12 "Platform DMA Engine (PDMA)" of
26 #include "sf-pdma.h"
71 desc->xfer_type = desc->chan->pdma->transfer_type; in sf_pdma_fill_desc()
93 dev_err(chan->pdma->dma_dev.dev, in sf_pdma_prep_dma_memcpy()
260 dev_err(chan->pdma->dma_dev.dev, "NULL desc.\n"); in sf_pdma_xfer_desc()
387 * sf_pdma_irq_init() - Init PDMA IRQ Handlers
389 * @pdma: pointer of PDMA engine. Caller should check NULL
401 static int sf_pdma_irq_init(struct platform_device *pdev, struct sf_pdma *pdma) in sf_pdma_irq_init() argument
406 for (i = 0; i < pdma->n_chans; i++) { in sf_pdma_irq_init()
407 chan = &pdma->chans[i]; in sf_pdma_irq_init()
[all …]
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| D | Kconfig | 2 tristate "Sifive PDMA controller driver"
7 Support the SiFive PDMA controller.
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| D | sf-pdma.h | 12 * - Chapter 12 "Platform DMA Engine (PDMA)" of
57 #define SF_PDMA_REG_BASE(ch) (pdma->membase + (PDMA_CHAN_OFFSET * (ch)))
96 struct sf_pdma *pdma; member
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| /linux-6.12.1/Documentation/devicetree/bindings/dma/ |
| D | sifive,fu540-c000-pdma.yaml | 4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
32 - microchip,mpfs-pdma
33 - sifive,fu540-c000-pdma
36 Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
38 "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the
39 SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block
68 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
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| D | marvell,mmp-dma.yaml | 18 - marvell,pdma-1.0
54 - marvell,pdma-1.0
67 compatible = "marvell,pdma-1.0";
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| /linux-6.12.1/include/linux/dma/ |
| D | k3-psil.h | 31 * @PSIL_EP_PDMA_XY: XY mode PDMA
32 * @PSIL_EP_PDMA_MCAN: MCAN mode PDMA
33 * @PSIL_EP_PDMA_AASRC: AASRC mode PDMA
50 * @pdma_acc32: ACC32 must be enabled on the PDMA side
51 * @pdma_burst: BURST must be enabled on the PDMA side
70 /* PDMA properties, valid for PSIL_EP_PDMA_* */
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| /linux-6.12.1/Documentation/devicetree/bindings/crypto/ |
| D | artpec6-crypto.txt | 1 Axis crypto engine with PDMA interface.
7 - reg: Base address and size for the PDMA register area.
8 - interrupts: Interrupt handle for the PDMA interrupt line.
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| /linux-6.12.1/arch/mips/boot/dts/ingenic/ |
| D | x1000.dtsi | 274 dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>,
275 <&pdma X1000_DMA_SSI0_TX 0xffffffff>;
323 pdma: dma-controller@13420000 { label
349 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
350 <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
370 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
371 <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
434 dmas = <&pdma X1000_DMA_I2S0_RX 0xffffffff>,
435 <&pdma X1000_DMA_I2S0_TX 0xffffffff>;
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| D | x1830.dtsi | 256 dmas = <&pdma X1830_DMA_SSI0_RX 0xffffffff>,
257 <&pdma X1830_DMA_SSI0_TX 0xffffffff>;
275 dmas = <&pdma X1830_DMA_SSI1_RX 0xffffffff>,
276 <&pdma X1830_DMA_SSI1_TX 0xffffffff>;
333 pdma: dma-controller@13420000 { label
359 dmas = <&pdma X1830_DMA_MSC0_RX 0xffffffff>,
360 <&pdma X1830_DMA_MSC0_TX 0xffffffff>;
380 dmas = <&pdma X1830_DMA_MSC1_RX 0xffffffff>,
381 <&pdma X1830_DMA_MSC1_TX 0xffffffff>;
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| /linux-6.12.1/arch/arm/boot/dts/intel/pxa/ |
| D | pxa3xx.dtsi | 121 pdma: dma-controller@40000000 { label
122 compatible = "marvell,pdma-1.0";
150 dmas = <&pdma 97 3>;
188 dmas = <&pdma 21 3
189 &pdma 22 3>;
199 dmas = <&pdma 93 3
200 &pdma 94 3>;
210 dmas = <&pdma 46 3
211 &pdma 47 3>;
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| D | pxa27x.dtsi | 11 pdma: dma-controller@40000000 { label
12 compatible = "marvell,pdma-1.0";
107 dmas = <&pdma 68 0 /* Y channel */
108 &pdma 69 0 /* U channel */
109 &pdma 70 0>; /* V channel */
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| D | pxa25x.dtsi | 37 pdma: dma-controller@40000000 { label
38 compatible = "marvell,pdma-1.0";
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| /linux-6.12.1/drivers/video/fbdev/riva/ |
| D | nvreg.h | 84 #define PDMA_Write(reg,value) DEVICE_WRITE(PDMA,reg,value)
85 #define PDMA_Read(reg) DEVICE_READ(PDMA,reg)
86 #define PDMA_Print(reg) DEVICE_PRINT(PDMA,reg)
87 #define PDMA_Def(mask,value) DEVICE_DEF(PDMA,mask,value)
88 #define PDMA_Val(mask,value) DEVICE_VALUE(PDMA,mask,value)
89 #define PDMA_Mask(mask) DEVICE_MASK(PDMA,mask)
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| /linux-6.12.1/Documentation/devicetree/bindings/net/ |
| D | airoha,en7581-eth.yaml | 44 - description: PDMA irq
52 - const: pdma
120 reset-names = "fe", "pdma", "qdma", "xsi-mac",
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| /linux-6.12.1/arch/arm/boot/dts/rockchip/ |
| D | rk3128.dtsi | 432 dmas = <&pdma 14>, <&pdma 15>;
444 dmas = <&pdma 13>;
468 dmas = <&pdma 10>;
484 dmas = <&pdma 11>;
500 dmas = <&pdma 12>;
515 dmas = <&pdma 0>, <&pdma 1>;
767 dmas = <&pdma 2>, <&pdma 3>;
783 dmas = <&pdma 4>, <&pdma 5>;
799 dmas = <&pdma 6>, <&pdma 7>;
839 dmas = <&pdma 8>, <&pdma 9>;
[all …]
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| D | rv1108.dtsi | 105 dmas = <&pdma 6>, <&pdma 7>;
120 dmas = <&pdma 4>, <&pdma 5>;
135 dmas = <&pdma 2>, <&pdma 3>;
189 dmas = <&pdma 8>, <&pdma 9>;
240 pdma: dma-controller@102a0000 { label
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| /linux-6.12.1/drivers/net/ethernet/mediatek/ |
| D | mtk_eth_soc.h | 100 /* PDMA HW LRO Alter Flow Timer Register */
170 /* PDMA HW LRO Control Registers */
191 /* PDMA Global Configuration Register */
195 /* PDMA Reset Index Register */
199 /* PDMA Delay Interrupt Register */
213 /* PDMA HW LRO Alter Flow Delta Register */
216 /* PDMA HW LRO IP Setting Registers */
221 /* PDMA HW LRO Ring Control Registers */
345 /* PDMA on MT7628 */
378 #define RX_DMA_L4_VALID_PDMA BIT(30) /* when PDMA is used */
[all …]
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| /linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/dma/ |
| D | gf100.c | 34 struct nvkm_dma **pdma) in gf100_dma_new() argument
36 return nvkm_dma_new_(&gf100_dma, device, type, inst, pdma); in gf100_dma_new()
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| D | gv100.c | 32 struct nvkm_dma **pdma) in gv100_dma_new() argument
34 return nvkm_dma_new_(&gv100_dma, device, type, inst, pdma); in gv100_dma_new()
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| D | nv04.c | 34 struct nvkm_dma **pdma) in nv04_dma_new() argument
36 return nvkm_dma_new_(&nv04_dma, device, type, inst, pdma); in nv04_dma_new()
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| D | gf119.c | 34 struct nvkm_dma **pdma) in gf119_dma_new() argument
36 return nvkm_dma_new_(&gf119_dma, device, type, inst, pdma); in gf119_dma_new()
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| D | nv50.c | 34 struct nvkm_dma **pdma) in nv50_dma_new() argument
36 return nvkm_dma_new_(&nv50_dma, device, type, inst, pdma); in nv50_dma_new()
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| D | base.c | 107 enum nvkm_subdev_type type, int inst, struct nvkm_dma **pdma) in nvkm_dma_new_() argument
111 if (!(dma = *pdma = kzalloc(sizeof(*dma), GFP_KERNEL))) in nvkm_dma_new_()
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| /linux-6.12.1/arch/mips/ralink/ |
| D | ill_acc.c | 29 "cpu", "dma", "ppe", "pdma rx", "pdma tx", "pci/e", "wmac", "usb",
|