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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Drockchip,pcie3-phy.yaml108 <&cru PCLK_PCIE30PHY>;
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3568.dtsi55 <&cru PCLK_PCIE30PHY>;
/linux-6.12.1/include/dt-bindings/clock/
Drk3568-cru.h439 #define PCLK_PCIE30PHY 375 macro
/linux-6.12.1/drivers/clk/rockchip/
Dclk-rk3568.c1441 GATE(PCLK_PCIE30PHY, "pclk_pcie30phy", "pclk_top", 0,