Searched full:mx8mq (Results 1 – 25 of 33) sorted by relevance
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/linux-6.12.1/tools/perf/pmu-events/arch/arm64/freescale/imx8mq/sys/ |
D | ddrc.json | 7 "Compat": "i.MX8MQ" 14 "Compat": "i.MX8MQ" 21 "Compat": "i.MX8MQ" 28 "Compat": "i.MX8MQ" 35 "Compat": "i.MX8MQ"
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D | metrics.json | 8 "Compat": "i.MX8MQ" 16 "Compat": "i.MX8MQ"
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/linux-6.12.1/drivers/gpu/drm/imx/dcss/ |
D | Kconfig | 2 tristate "i.MX8MQ DCSS" 11 Choose this if you have a NXP i.MX8MQ based system and want to use the
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D | dcss-drv.c | 127 MODULE_DESCRIPTION("DCSS driver for i.MX8MQ");
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D | dcss-kms.c | 33 .desc = "i.MX8MQ Display Subsystem",
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/linux-6.12.1/drivers/media/platform/nxp/ |
D | Kconfig | 21 tristate "NXP i.MX8MQ MIPI CSI-2 receiver" 28 Video4Linux2 driver for the MIPI CSI-2 receiver found on the i.MX8MQ
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D | imx8mq-mipi-csi2.c | 3 * NXP i.MX8MQ SoC series MIPI-CSI2 receiver driver 45 /* i.MX8MQ CSI-2 controller CSR */ 966 MODULE_DESCRIPTION("i.MX8MQ MIPI CSI-2 receiver driver");
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/linux-6.12.1/Documentation/devicetree/bindings/soc/imx/ |
D | fsl,imx8mq-vpu-blk-ctrl.yaml | 7 title: NXP i.MX8MQ VPU blk-ctrl 13 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
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/linux-6.12.1/drivers/interconnect/imx/ |
D | imx8mq.c | 3 * Interconnect framework driver for i.MX8MQ SoC 100 MODULE_DESCRIPTION("Interconnect framework driver for i.MX8MQ SoC");
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D | Kconfig | 16 tristate "i.MX8MQ interconnect driver"
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/linux-6.12.1/Documentation/devicetree/bindings/media/ |
D | nxp,imx8mq-mipi-csi2.yaml | 7 title: NXP i.MX8MQ MIPI CSI-2 receiver 14 NXP i.MX8MQ SoC. It handles the sensor/image input and process for all the
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D | nxp,imx8mq-vpu.yaml | 14 Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
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/linux-6.12.1/Documentation/devicetree/bindings/reset/ |
D | fsl,imx7-src.yaml | 20 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ, i.MX8MM and i.MX8MN,
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/linux-6.12.1/drivers/clk/imx/ |
D | Kconfig | 93 Build the driver for i.MX8MQ CCM Clock Driver
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/linux-6.12.1/Documentation/devicetree/bindings/arm/ |
D | fsl.yaml | 1176 - description: i.MX8MQ based Boards 1179 - boundary,imx8mq-nitrogen8m # i.MX8MQ NITROGEN Board 1180 - boundary,imx8mq-nitrogen8m-som # i.MX8MQ NITROGEN SoM 1181 - einfochips,imx8mq-thor96 # i.MX8MQ Thor96 Board 1182 - fsl,imx8mq-evk # i.MX8MQ EVK Board 1190 - description: i.MX8MQ NITROGEN SoM based Boards 1193 - const: boundary,imx8mq-nitrogen8m-som # i.MX8MQ NITROGEN SoM 1206 TQMa8Mx is a series of SOM featuring NXP i.MX8MQ system-on-chip 1210 - tq,imx8mq-tqma8mq-mba8mx # TQ-Systems GmbH i.MX8MQ TQMa8Mx SOM on MBa8Mx 1211 - const: tq,imx8mq-tqma8mq # TQ-Systems GmbH i.MX8MQ TQMa8Mx SOM
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/linux-6.12.1/Documentation/devicetree/bindings/nvmem/ |
D | imx-ocotp.yaml | 17 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN i.MX8MP and i.MX93/5 SoCs.
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/linux-6.12.1/Documentation/devicetree/bindings/phy/ |
D | fsl,imx8mq-usb-phy.yaml | 7 title: Freescale i.MX8MQ USB3 PHY
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx8mq-hummingboard-pulse.dts | 12 model = "SolidRun i.MX8MQ HummingBoard Pulse";
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D | imx8mq-nitrogen-som.dtsi | 10 model = "Boundary Devices i.MX8MQ Nitrogen8M";
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D | imx8mq-tqma8mq-mba8mx.dts | 12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx";
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D | imx8mq-tqma8mq.dtsi | 9 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ";
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D | imx8mq-phanbell.dts | 12 model = "Google i.MX8MQ Phanbell";
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/linux-6.12.1/drivers/soc/imx/ |
D | soc-imx8m.c | 155 .name = "i.MX8MQ",
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/linux-6.12.1/drivers/pinctrl/freescale/ |
D | pinctrl-imx8mq.c | 357 MODULE_DESCRIPTION("NXP i.MX8MQ pinctrl driver");
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/linux-6.12.1/drivers/gpu/drm/bridge/ |
D | nwl-dsi.c | 39 /* i.MX8MQ errata E11418 */ 100 * hardware bug: the i.MX8MQ needs this clock on during reset 1141 { .soc_id = "i.MX8MQ", .revision = "2.0",
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