Searched full:mx7ulp (Results 1 – 18 of 18) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | imx7ulp-scg-clock.yaml | 7 title: Freescale i.MX7ULP System Clock Generation (SCG) modules Clock Controller
13 i.MX7ULP Clock functions are under joint control of the System
38 i.MX7ULP clock IDs of each module.
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| D | imx7ulp-pcc-clock.yaml | 7 title: Freescale i.MX7ULP Peripheral Clock Control (PCC) modules Clock Controller
13 i.MX7ULP Clock functions are under joint control of the System
35 i.MX7ULP clock IDs of each module.
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| /linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx7ulp-pinctrl.txt | 1 * Freescale i.MX7ULP IOMUX Controller
23 Please refer to i.MX7ULP Reference Manual for detailed
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| /linux-6.12.1/Documentation/devicetree/bindings/arm/freescale/ |
| D | fsl,imx7ulp-sim.yaml | 7 title: Freescale i.MX7ULP System Integration Module
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| D | fsl,imx7ulp-pm.yaml | 7 title: Freescale i.MX7ULP Power Management Components
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| /linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
| D | imx7ulp-com.dts | 11 model = "Embedded Artists i.MX7ULP COM";
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| D | imx7ulp-evk.dts | 13 model = "NXP i.MX7ULP EVK";
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| /linux-6.12.1/Documentation/devicetree/bindings/watchdog/ |
| D | fsl-imx7ulp-wdt.yaml | 7 title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller
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| /linux-6.12.1/arch/arm/mach-imx/ |
| D | mach-imx7ulp.c | 80 DT_MACHINE_START(IMX7ulp, "Freescale i.MX7ULP (Device Tree)")
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| D | Kconfig | 222 bool "i.MX7ULP support"
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| /linux-6.12.1/Documentation/devicetree/bindings/nvmem/ |
| D | imx-ocotp.yaml | 17 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN i.MX8MP and i.MX93/5 SoCs.
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| /linux-6.12.1/drivers/watchdog/ |
| D | imx7ulp_wdt.c | 238 .identity = "i.MX7ULP watchdog timer",
429 MODULE_DESCRIPTION("Freescale i.MX7ULP watchdog driver");
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| /linux-6.12.1/drivers/soc/imx/ |
| D | soc-imx.c | 123 soc_id = "i.MX7ULP"; in imx_soc_device_init()
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| /linux-6.12.1/drivers/dma/ |
| D | fsl-edma-main.c | 293 * 16 channel independent interrupts + 1 error interrupt on i.mx7ulp. in fsl_edma2_irq_init()
296 * channels are enough on i.mx7ulp whose M4 domain own some peripherals. in fsl_edma2_irq_init()
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| /linux-6.12.1/drivers/spi/ |
| D | spi-fsl-lpspi.c | 3 // Freescale i.MX7ULP LPSPI driver
36 /* i.MX7ULP LPSPI registers */
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| /linux-6.12.1/Documentation/devicetree/bindings/arm/ |
| D | fsl.yaml | 925 - description: i.MX7ULP based Boards
928 - ea,imx7ulp-com # i.MX7ULP Embedded Artists COM Board
929 - fsl,imx7ulp-evk # i.MX7ULP Evaluation Kit
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| /linux-6.12.1/drivers/pwm/ |
| D | Kconfig | 305 Generic PWM framework driver for i.MX7ULP TPM module, TPM's full
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| /linux-6.12.1/drivers/tty/serial/ |
| D | fsl_lpuart.c | 119 /* 32-bit global registers only for i.MX7ULP/i.MX8x
3155 /* i.MX7ULP enter VLLS mode that lpuart module power off and registers in lpuart_console_fixup()
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