Searched full:mx6q (Results 1 – 25 of 27) sorted by relevance
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| /linux-6.12.1/Documentation/devicetree/bindings/display/imx/ |
| D | ldb.txt | 16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
29 On i.MX6q the following additional clocks are needed:
37 - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q
39 not used on i.MX6q
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| /linux-6.12.1/arch/arm/mach-imx/ |
| D | mach-imx6q.c | 173 * SoCs that identify as i.MX6Q >= rev 2.0 are really i.MX6QP. in imx6q_init_machine()
174 * Quirk: i.MX6QP revision = i.MX6Q revision - (1, 0), in imx6q_init_machine()
175 * e.g. i.MX6QP rev 1.1 identifies as i.MX6Q rev 2.1. in imx6q_init_machine()
179 imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q", in imx6q_init_machine()
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| D | hardware.h | 79 * mx6q:
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| /linux-6.12.1/Documentation/admin-guide/media/ |
| D | imx.rst | 108 The following shows the media topologies for the i.MX6Q SabreSD and
109 i.MX6Q SabreAuto. Refer to these diagrams in the entity descriptions
123 :alt: Diagram of the i.MX6Q SabreSD media pipeline topology
126 Media pipeline graph on i.MX6Q SabreSD
129 :alt: Diagram of the i.MX6Q SabreAuto media pipeline topology
132 Media pipeline graph on i.MX6Q SabreAuto
409 i.MX6Q SabreLite with OV5642 and OV5640
463 i.MX6Q SabreAuto with ADV7180 decoder
466 On the i.MX6Q SabreAuto, an on-board ADV7180 SD decoder is connected to the
579 i.MX6Q SabreSD with MIPI CSI-2 OV5640
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| /linux-6.12.1/Documentation/devicetree/bindings/arm/ |
| D | fsl.yaml | 251 - description: i.MX6Q based Boards
263 - emtrion,emcon-mx6 # emCON-MX6D or emCON-MX6Q SoM
264 - emtrion,emcon-mx6-avari # emCON-MX6D or emCON-MX6Q SoM on Avari Base
293 - technexion,imx6q-pico-dwarf # TechNexion i.MX6Q Pico-Dwarf
294 - technexion,imx6q-pico-hobbit # TechNexion i.MX6Q Pico-Hobbit
295 - technexion,imx6q-pico-nymph # TechNexion i.MX6Q Pico-Nymph
296 - technexion,imx6q-pico-pi # TechNexion i.MX6Q Pico-Pi
310 - description: i.MX6Q Advantech DMS-BA16 Boards
320 - description: i.MX6Q Armadeus APF6 Boards
326 - description: i.MX6Q CompuLab Utilite Pro Board
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/thermal/ |
| D | imx-thermal.yaml | 27 The interrupt output of the controller, i.MX6Q has IRQ_HIGH which
29 i.MX6SX and i.MX7S/D have two more IRQs than i.MX6Q, one is IRQ_LOW
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| /linux-6.12.1/Documentation/usb/ |
| D | chipidea.rst | 9 with 2 Freescale i.MX6Q sabre SD boards.
35 1) Power up 2 Freescale i.MX6Q sabre SD boards with gadget class driver loaded
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| /linux-6.12.1/Documentation/devicetree/bindings/media/ |
| D | fsl-vdoa.txt | 4 The Video Data Order Adapter (VDOA) is present on the i.MX6q. Its sole purpose
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| /linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
| D | imx6q-dhcom-pdk2.dts | 18 model = "DH electronics i.MX6Q DHCOM on Premium Developer Kit (2)";
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| D | imx6qdl-dhcom-som.dtsi | 209 * The erratum for i.MX6S/DL is here [1] and for i.MX6Q/D is here [2].
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| /linux-6.12.1/drivers/clocksource/ |
| D | timer-imx-gpt.c | 24 * - MX25, MX31, MX35, MX37, MX51, MX6Q(rev1.0)
25 * - MX6DL, MX6SX, MX6Q(rev1.1+)
484 * We were using the same compatible string for i.MX6Q/D and i.MX6DL/S in imx31_timer_init_dt()
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| /linux-6.12.1/Documentation/devicetree/bindings/nvmem/ |
| D | imx-ocotp.yaml | 16 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
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| /linux-6.12.1/Documentation/devicetree/bindings/power/ |
| D | fsl,imx-gpc.yaml | 77 The following DOMAIN_INDEX values are valid for i.MX6Q:
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| /linux-6.12.1/drivers/soc/imx/ |
| D | soc-imx.c | 99 soc_id = "i.MX6Q"; in imx_soc_device_init()
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| /linux-6.12.1/drivers/mtd/nand/raw/gpmi-nand/ |
| D | gpmi-nand.h | 16 #define GPMI_CLK_MAX 5 /* MX6Q needs five clocks */
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| D | gpmi-nand.c | 832 * is 16000ps, but in mx6q, we use 12000ps.
934 * during the change of the divide factor on i.MX6Q/UL/SX. On i.MX7/8, in gpmi_nfc_apply_timings()
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| /linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | fsl,imx-weim.yaml | 63 WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
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| /linux-6.12.1/drivers/cpufreq/ |
| D | imx6q-cpufreq.c | 248 * 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz. in imx6q_opp_check_speed_grading()
531 MODULE_DESCRIPTION("Freescale i.MX6Q cpufreq driver");
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| /linux-6.12.1/arch/arm/ |
| D | Kconfig.debug | 474 bool "i.MX6Q/DL Debug UART"
478 on i.MX6Q/DL.
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| /linux-6.12.1/drivers/gpu/drm/imx/ipuv3/ |
| D | imx-ldb.c | 651 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel in imx_ldb_probe()
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| /linux-6.12.1/drivers/clk/imx/ |
| D | clk-imx6q.c | 465 /* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */ in imx6q_clocks_init()
910 * The gpt_3m clock is not available on i.MX6Q TO1.0. Let's point it in imx6q_clocks_init()
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| /linux-6.12.1/drivers/net/ethernet/freescale/ |
| D | fec.h | 508 /* i.MX6Q adds pm_qos support */
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| /linux-6.12.1/drivers/ata/ |
| D | ahci_imx.c | 961 * TIMER1MS register on i.MX53, i.MX6Q and i.MX6QP only. in imx_ahci_probe()
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| /linux-6.12.1/drivers/tty/serial/ |
| D | imx.c | 179 /* i.MX21 type uart runs on all i.mx except i.MX1 and i.MX6q */
1171 * There are two kinds of RX DMA interrupts(such as in the MX6Q):
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| /linux-6.12.1/drivers/mmc/host/ |
| D | sdhci-esdhc-imx.c | 1463 * erratum ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL in sdhci_esdhc_imx_hwinit()
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