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/linux-6.12.1/drivers/net/ethernet/sfc/falcon/
Dmdio_10g.c31 int ef4_mdio_reset_mmd(struct ef4_nic *port, int mmd, in ef4_mdio_reset_mmd() argument
39 ef4_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET); in ef4_mdio_reset_mmd()
43 ctrl = ef4_mdio_read(port, mmd, MDIO_CTRL1); in ef4_mdio_reset_mmd()
51 static int ef4_mdio_check_mmd(struct ef4_nic *efx, int mmd) in ef4_mdio_check_mmd() argument
55 if (mmd != MDIO_MMD_AN) { in ef4_mdio_check_mmd()
56 /* Read MMD STATUS2 to check it is responding. */ in ef4_mdio_check_mmd()
57 status = ef4_mdio_read(efx, mmd, MDIO_STAT2); in ef4_mdio_check_mmd()
60 "PHY MMD %d not responding.\n", mmd); in ef4_mdio_check_mmd()
81 int mmd = 0; in ef4_mdio_wait_reset_mmds() local
86 stat = ef4_mdio_read(efx, mmd, MDIO_CTRL1); in ef4_mdio_wait_reset_mmds()
[all …]
Dtxc43128_phy.c182 /* Reset the PMA/PMD MMD. The documentation is explicit that this does a
204 /* Run a single BIST on one MMD */
205 static int txc_bist_one(struct ef4_nic *efx, int mmd, int test) in txc_bist_one() argument
219 ef4_mdio_write(efx, mmd, TXC_BIST_CTL, bctl); in txc_bist_one()
223 ef4_mdio_write(efx, mmd, TXC_BIST_CTL, bctl); in txc_bist_one()
226 ef4_mdio_write(efx, mmd, TXC_BIST_CTL, in txc_bist_one()
234 ef4_mdio_write(efx, mmd, TXC_BIST_CTL, bctl); in txc_bist_one()
238 bctl = ef4_mdio_read(efx, mmd, TXC_BIST_CTL); in txc_bist_one()
243 int count = ef4_mdio_read(efx, mmd, TXC_BIST_RX0ERRCNT + lane); in txc_bist_one()
249 count = ef4_mdio_read(efx, mmd, TXC_BIST_RX0FRMCNT + lane); in txc_bist_one()
[all …]
Dmdio_10g.h33 static inline u32 ef4_mdio_read_id(struct ef4_nic *efx, int mmd) in ef4_mdio_read_id() argument
35 u16 id_low = ef4_mdio_read(efx, mmd, MDIO_DEVID2); in ef4_mdio_read_id()
36 u16 id_hi = ef4_mdio_read(efx, mmd, MDIO_DEVID1); in ef4_mdio_read_id()
56 const char *ef4_mdio_mmd_name(int mmd);
59 * Reset a specific MMD and wait for reset to clear.
64 int ef4_mdio_reset_mmd(struct ef4_nic *efx, int mmd, int spins, int spintime);
Dqt202x_phy.c317 /* Reset the PHYXS MMD. This is documented as doing in qt202x_reset_phy()
461 int mmd, reg_base, rc, i; in qt202x_phy_get_module_eeprom() local
464 mmd = MDIO_MMD_PCS; in qt202x_phy_get_module_eeprom()
467 mmd = MDIO_MMD_PMAPMD; in qt202x_phy_get_module_eeprom()
472 rc = ef4_mdio_read(efx, mmd, reg_base + ee->offset + i); in qt202x_phy_get_module_eeprom()
/linux-6.12.1/rust/kernel/net/phy/
Dreg.rs33 /// dev.read(C45::new(Mmd::PMAPMD, 0));
85 /// MMD Register control.
87 /// MMD Register address data.
139 pub struct Mmd(u8); struct
141 impl Mmd { impl
143 pub const PMAPMD: Self = Mmd(uapi::MDIO_MMD_PMAPMD as u8);
145 pub const WIS: Self = Mmd(uapi::MDIO_MMD_WIS as u8);
147 pub const PCS: Self = Mmd(uapi::MDIO_MMD_PCS as u8);
149 pub const PHYXS: Self = Mmd(uapi::MDIO_MMD_PHYXS as u8);
151 pub const DTEXS: Self = Mmd(uapi::MDIO_MMD_DTEXS as u8);
[all …]
/linux-6.12.1/drivers/net/phy/
Dqt2025.rs17 reg::{Mmd, C45},
45 let hw_rev = dev.read(C45::new(Mmd::PMAPMD, 0xd001))?; in probe()
51 dev.write(C45::new(Mmd::PMAPMD, 0xc300), 0x0000)?; in probe()
53 dev.write(C45::new(Mmd::PMAPMD, 0xc302), 0x0004)?; in probe()
55 dev.write(C45::new(Mmd::PMAPMD, 0xc319), 0x0038)?; in probe()
57 dev.write(C45::new(Mmd::PMAPMD, 0xc31a), 0x0098)?; in probe()
61 dev.write(C45::new(Mmd::PCS, 0x0026), 0x0e00)?; in probe()
62 dev.write(C45::new(Mmd::PCS, 0x0027), 0x0893)?; in probe()
63 dev.write(C45::new(Mmd::PCS, 0x0028), 0xa528)?; in probe()
64 dev.write(C45::new(Mmd::PCS, 0x0029), 0x0003)?; in probe()
[all …]
Dphy-core.c534 /* Write the desired MMD Devad */ in mmd_phy_indirect()
537 /* Write the desired MMD register address */ in mmd_phy_indirect()
552 /* Read the content of the MMD's selected register */ in mmd_phy_read()
563 /* Write the data into MMD's selected register */ in mmd_phy_write()
569 * from an MMD on a given PHY.
571 * @devad: The MMD to read from (0..31)
572 * @regnum: The register on the MMD to read (0..65535)
591 * from an MMD on a given PHY.
593 * @devad: The MMD to read from
594 * @regnum: The register on the MMD to read
[all …]
Dphy-c45.c315 * are controlled through the PMA/PMD MMD registers.
335 * This assumes that the auto-negotiation MMD is present.
356 * This assumes that the auto-negotiation MMD is present.
389 * This assumes that the auto-negotiation MMD is present.
391 * Reads the status register from the auto-negotiation MMD, returning:
518 * in @phydev. This assumes that the auto-negotiation MMD is present, and
1283 * the current PLCA configuration from the standard registers in MMD 31.
1337 * the PLCA configuration using the standard registers in MMD 31.
1451 * the current PLCA status information from the standard registers in MMD 31.
/linux-6.12.1/drivers/net/dsa/sja1105/
Dsja1105_mdio.c10 int sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg) in sja1105_pcs_mdio_read_c45() argument
18 addr = (mmd << 16) | reg; in sja1105_pcs_mdio_read_c45()
20 if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2) in sja1105_pcs_mdio_read_c45()
23 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID1) in sja1105_pcs_mdio_read_c45()
25 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID2) in sja1105_pcs_mdio_read_c45()
35 int sja1105_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, in sja1105_pcs_mdio_write_c45() argument
43 addr = (mmd << 16) | reg; in sja1105_pcs_mdio_write_c45()
46 if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2) in sja1105_pcs_mdio_write_c45()
52 int sja1110_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg) in sja1110_pcs_mdio_read_c45() argument
65 addr = (mmd << 16) | reg; in sja1110_pcs_mdio_read_c45()
[all …]
Dsja1105.h154 int (*pcs_mdio_read_c45)(struct mii_bus *bus, int phy, int mmd,
156 int (*pcs_mdio_write_c45)(struct mii_bus *bus, int phy, int mmd,
312 int sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg);
313 int sja1105_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, int reg,
315 int sja1110_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg);
316 int sja1110_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, int reg,
/linux-6.12.1/drivers/net/ethernet/aquantia/atlantic/
Daq_phy.c26 u16 aq_mdio_read_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr) in aq_mdio_read_word() argument
28 u16 phy_addr = aq_hw->phy_id << 5 | mmd; in aq_mdio_read_word()
52 void aq_mdio_write_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr, u16 data) in aq_mdio_write_word() argument
54 u16 phy_addr = aq_hw->phy_id << 5 | mmd; in aq_mdio_write_word()
78 u16 aq_phy_read_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address) in aq_phy_read_reg() argument
91 err = aq_mdio_read_word(aq_hw, mmd, address); in aq_phy_read_reg()
99 void aq_phy_write_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address, u16 data) in aq_phy_write_reg() argument
109 aq_mdio_write_word(aq_hw, mmd, address, data); in aq_phy_write_reg()
Daq_phy.h22 u16 aq_mdio_read_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr);
24 void aq_mdio_write_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr, u16 data);
26 u16 aq_phy_read_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address);
28 void aq_phy_write_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address, u16 data);
/linux-6.12.1/drivers/net/ethernet/intel/e1000e/
Dich8lan.h249 #define I82579_EEE_PCS_STATUS 0x182E /* IEEE MMD Register 3.1 >> 8 */
250 #define I82579_EEE_CAPABILITY 0x0410 /* IEEE MMD Register 3.20 */
251 #define I82579_EEE_ADVERTISEMENT 0x040E /* IEEE MMD Register 7.60 */
252 #define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */
256 #define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */
257 #define I217_EEE_CAPABILITY 0x8000 /* IEEE MMD Register 3.20 */
258 #define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */
259 #define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */
/linux-6.12.1/drivers/vfio/platform/reset/
Dvfio_platform_amdxgbe.c27 static unsigned int xmdio_read(void __iomem *ioaddr, unsigned int mmd, in xmdio_read() argument
32 mmd_address = (mmd << 16) | ((reg) & 0xffff); in xmdio_read()
38 static void xmdio_write(void __iomem *ioaddr, unsigned int mmd, in xmdio_write() argument
43 mmd_address = (mmd << 16) | ((reg) & 0xffff); in xmdio_write()
/linux-6.12.1/drivers/net/mdio/
Dmdio-ipq4019.c68 static int ipq4019_mdio_read_c45(struct mii_bus *bus, int mii_id, int mmd, in ipq4019_mdio_read_c45() argument
84 /* issue the phy address and mmd */ in ipq4019_mdio_read_c45()
85 writel((mii_id << 8) | mmd, priv->membase + MDIO_ADDR_REG); in ipq4019_mdio_read_c45()
141 static int ipq4019_mdio_write_c45(struct mii_bus *bus, int mii_id, int mmd, in ipq4019_mdio_write_c45() argument
157 /* issue the phy address and mmd */ in ipq4019_mdio_write_c45()
158 writel((mii_id << 8) | mmd, priv->membase + MDIO_ADDR_REG); in ipq4019_mdio_write_c45()
/linux-6.12.1/drivers/net/
Dmdio.c28 int mmd, stat2, devs1, devs2; in mdio45_probe() local
32 for (mmd = 1; mmd <= 5; mmd++) { in mdio45_probe()
33 /* Is this MMD present? */ in mdio45_probe()
34 stat2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_STAT2); in mdio45_probe()
40 devs1 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS1); in mdio45_probe()
41 devs2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS2); in mdio45_probe()
58 * @devad: MMD address
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb/
Dcphy.h101 static inline int cphy_mdio_read(struct cphy *cphy, int mmd, int reg, in cphy_mdio_read() argument
104 int rc = cphy->mdio.mdio_read(cphy->mdio.dev, cphy->mdio.prtad, mmd, in cphy_mdio_read()
110 static inline int cphy_mdio_write(struct cphy *cphy, int mmd, int reg, in cphy_mdio_write() argument
113 return cphy->mdio.mdio_write(cphy->mdio.dev, cphy->mdio.prtad, mmd, in cphy_mdio_write()
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dbroadcom-bcm87xx.txt10 is the MDIO Manageable Device (MMD) address, the second a register
11 address within the MMD, the third cell contains a mask to be ANDed
/linux-6.12.1/drivers/net/pcs/
Dpcs-xpcs.h56 /* VR MII MMD registers offsets */
100 /* SR MII MMD Control defines */
105 /* SR MII MMD AN Advertisement defines */
/linux-6.12.1/include/linux/
Dphy.h1036 * @read_mmd: PHY specific driver override for reading a MMD
1038 * drivers. When not provided, the default MMD read function
1041 * Clause 22 PHYs. devnum is the MMD device number within the
1042 * PHY device, regnum is the register within the selected MMD
1048 * @write_mmd: PHY specific driver override for writing a MMD
1050 * drivers. When not provided, the default MMD write function
1053 * Clause 22 PHYs. devnum is the MMD device number within the
1054 * PHY device, regnum is the register within the selected MMD
1368 * from an MMD on a given PHY.
1377 * @devaddr: The MMD to read from
[all …]
Dmdio.h214 * @eee_cap: value of the MMD EEE Capability register
216 * A small helper function that translates MMD EEE Capability (3.20) bits
241 * @eee_adv: value of the MMD EEE Advertisement/Link Partner Ability registers
243 * A small helper function that translates the MMD EEE Advertisment (7.60)
244 * and MMD EEE Link Partner Ability (7.61) bits to ethtool advertisement
272 * to EEE advertisements for the MMD EEE Advertisement (7.60) and
273 * MMD EEE Link Partner Ability (7.61) registers.
/linux-6.12.1/include/uapi/linux/
Dmii.h25 #define MII_MMD_CTRL 0x0d /* MMD Access Control Register */
26 #define MII_MMD_DATA 0x0e /* MMD Access Data Register */
170 /* MMD Access Control register fields */
171 #define MII_MMD_CTRL_DEVAD_MASK 0x1f /* Mask MMD DEVAD*/
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb3/
Dcommon.h529 int (*set_loopback)(struct cphy *phy, int mmd, int dir, int enable);
561 static inline int t3_mdio_read(struct cphy *phy, int mmd, int reg, in t3_mdio_read() argument
564 int rc = phy->mdio.mdio_read(phy->mdio.dev, phy->mdio.prtad, mmd, reg); in t3_mdio_read()
569 static inline int t3_mdio_write(struct cphy *phy, int mmd, int reg, in t3_mdio_write() argument
572 return phy->mdio.mdio_write(phy->mdio.dev, phy->mdio.prtad, mmd, in t3_mdio_write()
654 int t3_mdio_change_bits(struct cphy *phy, int mmd, int reg, unsigned int clear,
656 int t3_phy_reset(struct cphy *phy, int mmd, int wait);
/linux-6.12.1/Documentation/devicetree/bindings/net/pcs/
Dsnps,dw-xpcs.yaml53 MMD '[20:16]', Reg '[15:0]'. In the later case the space is divided
56 the CSR address MMD+REG[20:8] is supposed to be written in there
/linux-6.12.1/drivers/net/phy/qcom/
Dqca83xx.c24 { "eee_wake_errors", 0x16, GENMASK(15, 0), MMD},
58 if (stat.access_type == MMD) in qca83xx_get_stat()

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