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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dmarvell,kirkwood-pinctrl.txt27 mpp3 3 gpo, nand(io5), spi(miso)
37 mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
65 mpp3 3 gpo, nand(io5), spi(miso)
75 mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
109 mpp3 3 gpo, nand(io5), spi(miso)
119 mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
140 mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk)
158 mpp3 3 gpo, nand(io5), spi(miso)
168 mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq),
189 mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk)
[all …]
Dmarvell,armada-370-pinctrl.txt35 mpp15 15 gpio, ge0(rxctl), pcie(clkreq1), sd0(d3), spi1(miso),
47 mpp26 26 gpio, ge0(crs), ge1(rxd1), spi1(miso)
57 mpp36 36 gpo, dev(a1), spi0(miso)
73 mpp50 50 gpio, dev(ad11), uart0(cts), sd0(d1), spi1(miso),
95 mpp64 64 gpio, spi0(miso), spi0(cs1)
Dmarvell,armada-375-pinctrl.txt20 mpp4 4 gpio, dev(ad6), spi0(miso), spi1(miso)
49 mpp33 33 gpio, ge1(txd3), spi1(miso)
Dmarvell,dove-pinctrl.txt24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu*
44 mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso),
Dmarvell,armada-38x-pinctrl.txt34 mpp16 16 gpio, ge0(rxctl), ge(mdio slave), dram(deccerr), spi0(miso), pcie0(clkreq), …
42 mpp24 24 gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready)
76 mpp58 58 gpio, pcie1(clkreq) [1], i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1), ua1(…
Dmarvell,armada-39x-pinctrl.txt34 mpp16 16 gpio, dram(deccerr), spi0(miso), pcie0(clkreq), i2c1(sda)
43 mpp24 24 gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready)
80 mpp58 58 gpio, i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1), ua1(rxd)
Dmarvell,armada-xp-pinctrl.txt38 mpp17 17 gpio, ge0(col), ge1(txctl), spi1(miso), lcd(d17)
58 mpp37 37 gpio, spi0(miso)
/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dspi-gpio.yaml27 miso-gpios:
28 description: GPIO spec for the MISO line to use
48 gpio-miso: false
66 miso-gpios = <&gpio 98 0>;
Dsamsung,spi-peripheral-props.yaml23 The sampling phase shift to be applied on the miso line (to account
24 for any lag in the miso line). Valid values:
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8192-asurada.dtsi793 aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins {
794 pins-miso-off {
799 aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins {
800 pins-miso-on {
805 aud_dat_miso_off_pins: aud-dat-miso-off-pins {
806 pins-miso-off {
812 aud_dat_miso_on_pins: aud-dat-miso-on-pins {
813 pins-miso-on {
821 pins-miso-off {
827 pins-miso-on {
[all …]
/linux-6.12.1/drivers/spi/
Dspi-gpio.c35 struct gpio_desc *miso; member
48 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
107 return !!gpiod_get_value_cansleep(spi_gpio->miso); in getmiso()
175 * speed in the generic case (when both MISO and MOSI lines are
282 * logic high when only clocking MISO data in can put some in spi_gpio_set_direction()
317 * On platforms which can do so, configure MISO with a weak pullup unless
328 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN); in spi_gpio_request()
329 if (IS_ERR(spi_gpio->miso)) in spi_gpio_request()
330 return PTR_ERR(spi_gpio->miso); in spi_gpio_request()
/linux-6.12.1/Documentation/devicetree/bindings/arm/marvell/
Dcp110-system-controller.txt101 mpp10 10 gpio, dev(readyn), ge0(txctl), spi0(miso), spi1(miso), uart0(cts), sata1(present_act)
104 mpp13 13 gpio, dev(burstn), nf(rbn0), spi1(miso), ge0(rxctl), mss_spi(miso)
105 mpp14 14 gpio, dev(bootcsn), dev(csn0), spi1(csn0), spi0(csn3), au(i2sextclk), spi0(miso), sata0(pr…
118 mpp27 27 gpio, dev(csn0), spi1(miso), mss_gpio4, ge0(rxd3), spi0(csn4), ge(mdio), sata0(present_act…
123 mpp32 32 gpio, mii(col), mii(txerr), mss_spi(miso), tdm(drx), au(i2sextclk), au(i2sdi), ge(mdio), s…
133 mpp42 42 gpio, sdio(v18_en), sdio(wr_protect), synce2(clk), au(i2smclk), mss_uart(txd), spi0(miso),…
140 mpp49 49 gpio, ge1(txclkout), mii(crs), spi1(miso), uart1(rxd), ge(mdio), pcie0(clkreq), sdio(v18_e…
149 mpp58 58 gpio, mss_i2c(sck), ptp(clk), tdm(rstn), au(i2sdi), spi0(miso), uart1(cts), led(clk), sdio…
/linux-6.12.1/arch/powerpc/include/asm/
Dqspinlock.h42 * Execute a miso instruction after passing the MCS lock ownership to the
43 * queue head. Miso is intended to make stores visible to other CPUs sooner.
55 * This executes miso after an unlock of the lock word, having ownership
158 asm volatile("miso" ::: "memory"); in queued_spin_unlock()
/linux-6.12.1/sound/soc/mediatek/mt8186/
Dmt8186-afe-gpio.c172 dev_dbg(dev, "%s(), MISO CLK ON select fail!\n", __func__); in mt8186_afe_gpio_adda_ul()
178 dev_dbg(dev, "%s(), MISO DAT ON select fail!\n", __func__); in mt8186_afe_gpio_adda_ul()
184 dev_dbg(dev, "%s(), MISO DAT OFF select fail!\n", __func__); in mt8186_afe_gpio_adda_ul()
190 dev_dbg(dev, "%s(), MISO CLK OFF select fail!\n", __func__); in mt8186_afe_gpio_adda_ul()
/linux-6.12.1/drivers/pinctrl/mvebu/
Dpinctrl-armada-cp110.c152 MPP_FUNCTION(4, "spi0", "miso"),
153 MPP_FUNCTION(5, "spi1", "miso"),
176 MPP_FUNCTION(3, "spi1", "miso"),
178 MPP_FUNCTION(8, "mss_spi", "miso")),
186 MPP_FUNCTION(6, "spi0", "miso"),
249 MPP_FUNCTION(2, "spi1", "miso"),
306 MPP_FUNCTION(3, "mss_spi", "miso"),
426 MPP_FUNCTION(6, "spi0", "miso"),
473 MPP_FUNCTION(5, "spi1", "miso"),
553 MPP_FUNCTION(6, "spi0", "miso"),
Dpinctrl-armada-375.c48 MPP_FUNCTION(0x6, "spi1", "miso")),
52 MPP_FUNCTION(0x2, "spi0", "miso"),
53 MPP_FUNCTION(0x3, "spi1", "miso"),
61 MPP_FUNCTION(0x6, "spi1", "miso")),
172 MPP_FUNCTION(0x5, "spi0", "miso"),
207 MPP_FUNCTION(0x3, "spi1", "miso"),
Dpinctrl-armada-370.c107 MPP_FUNCTION(0x4, "spi1", "miso"),
159 MPP_FUNCTION(0x4, "spi1", "miso")),
201 MPP_FUNCTION(0x2, "spi0", "miso")),
268 MPP_FUNCTION(0x4, "spi1", "miso"),
354 MPP_FUNCTION(0x1, "spi0", "miso"),
/linux-6.12.1/Documentation/spi/
Dbutterfly.rst38 MISO J403.PB3/MISO pin 11/S7,nBUSY
69 MISO J403.PE6/DO pin 12/S5,nPAPEROUT
Dspi-summary.rst16 Slave Out" (MISO) signals. (Other names are also used.) There are four
57 Some chips eliminate a signal line by combining MOSI and MISO, and
184 MOSI, and MISO.
506 SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On
639 MISO XXX__________ _______________________ _______ XXX
678 MISO XXX__________ _______________________ _______ XXX
/linux-6.12.1/Documentation/driver-api/
Dspi.rst8 line, and a "Master In, Slave Out" (MISO) data line. SPI is a full
10 another is shifted in on the MISO line. Those bits are assembled into
/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Drenesas,rcar-gyroadc.yaml82 of the TI/ADI chips to the GyroADC, while MISO line of each
90 of the MAX chips to the GyroADC, while MISO line of each Maxim
/linux-6.12.1/drivers/pinctrl/sunxi/
Dpinctrl-suniv-f1c100s.c61 SUNXI_FUNCTION(0x6, "spi1")), /* MISO */
94 SUNXI_FUNCTION(0x6, "spi1")), /* MISO */
108 SUNXI_FUNCTION(0x2, "spi0"), /* MISO */
250 SUNXI_FUNCTION(0x3, "spi0"), /* MISO */
333 SUNXI_FUNCTION(0x4, "spi1"), /* MISO */
/linux-6.12.1/tools/perf/pmu-events/arch/powerpc/power10/
Dtranslation.json10 … operations are excluded (pteupdate, snoop tlbie complete, store atomics, miso, load atomic payloa…
/linux-6.12.1/Documentation/devicetree/bindings/leds/
Dleds-spi-byte.txt7 - no return value is necessary (no MISO signal)
/linux-6.12.1/Documentation/hwmon/
Dlm70.rst46 comprise the MOSI/MISO loop. At the end of the transfer, the 11-bit 2's

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