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/linux-6.12.1/arch/mips/jazz/
DKconfig9 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
10 <http://www.linux-mips.org/>.
13 bool "Support for MIPS Magnum 4000"
20 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
21 <http://www.linux-mips.org/>.
30 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
31 <http://www.linux-mips.org/>.
/linux-6.12.1/Documentation/devicetree/bindings/mips/
Dcpus.yaml4 $id: http://devicetree.org/schemas/mips/cpus.yaml#
7 title: MIPS CPUs
32 - mips,m14Kc
33 - mips,mips1004Kc
34 - mips,mips24KEc
35 - mips,mips24Kc
36 - mips,mips4KEc
37 - mips,mips4Kc
38 - mips,mips74Kc
80 compatible = "mips,mips1004Kc";
[all …]
/linux-6.12.1/scripts/package/
Dbuildtar57 # mips and arm64 copy the first image found. This may not produce the desired
68 mips)
70 if [ -f "${objtree}/arch/mips/boot/compressed/vmlinux.bin" ]; then
71 …cp -v -- "${objtree}/arch/mips/boot/compressed/vmlinux.bin" "${tmpdir}/boot/vmlinuz-${KERNELRELEAS…
72 elif [ -f "${objtree}/arch/mips/boot/compressed/vmlinux.ecoff" ]; then
73 …cp -v -- "${objtree}/arch/mips/boot/compressed/vmlinux.ecoff" "${tmpdir}/boot/vmlinuz-${KERNELRELE…
74 elif [ -f "${objtree}/arch/mips/boot/compressed/vmlinux.srec" ]; then
75 …cp -v -- "${objtree}/arch/mips/boot/compressed/vmlinux.srec" "${tmpdir}/boot/vmlinuz-${KERNELRELEA…
80 elif [ -f "${objtree}/arch/mips/boot/vmlinux.bin" ]; then
81 cp -v -- "${objtree}/arch/mips/boot/vmlinux.bin" "${tmpdir}/boot/vmlinux-${KERNELRELEASE}"
[all …]
/linux-6.12.1/arch/mips/
DKconfig2 config MIPS config
143 bool "Generic board-agnostic MIPS kernel"
377 This enables support for DEC's MIPS based workstations. For details
378 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
415 This a family of machines based on the MIPS R4030 chipset which was
417 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
460 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
514 bool "MIPS Malta board"
567 This enables support for the MIPS Technologies Malta evaluation
575 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
[all …]
DMakefile15 $(Q)$(MAKE) $(build)=arch/mips/tools elf-entry
17 $(Q)$(MAKE) $(build)=arch/mips/tools loongson3-llsc-check
19 $(Q)$(MAKE) $(build)=arch/mips/boot/tools relocs
35 32bit-tool-archpref = mips
45 UTS_MACHINE := mips
93 # The DECStation requires an ECOFF kernel for remote booting, other MIPS
118 # stack space, else a SEGV is generated. This is not desirable for MIPS
129 # binutils from v2.35 when built with --enable-mips-fix-loongson3-llsc=yes,
230 # Warning: the 64-bit MIPS architecture does not support the `smartmips' extension
233 mips-cflags := $(cflags-y)
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/linux-6.12.1/arch/mips/crypto/
DKconfig3 menu "Accelerated Cryptographic Algorithms for CPU (mips)"
12 Architecture: mips
16 depends on MIPS
21 Architecture: mips
31 Architecture: mips OCTEON using crypto instructions, when available
41 Architecture: mips OCTEON
51 Architecture: mips OCTEON using crypto instructions, when available
61 Architecture: mips OCTEON using crypto instructions, when available
DMakefile3 # Makefile for MIPS crypto files..
6 obj-$(CONFIG_CRYPTO_CRC32_MIPS) += crc32-mips.o
8 obj-$(CONFIG_CRYPTO_CHACHA_MIPS) += chacha-mips.o
9 chacha-mips-y := chacha-core.o chacha-glue.o
12 obj-$(CONFIG_CRYPTO_POLY1305_MIPS) += poly1305-mips.o
13 poly1305-mips-y := poly1305-core.o poly1305-glue.o
21 $(obj)/poly1305-core.S: $(src)/poly1305-mips.pl FORCE
Dchacha-glue.c3 * MIPS accelerated ChaCha and XChaCha stream ciphers,
83 .base.cra_driver_name = "chacha20-mips",
98 .base.cra_driver_name = "xchacha20-mips",
113 .base.cra_driver_name = "xchacha12-mips",
144 MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (MIPS accelerated)");
148 MODULE_ALIAS_CRYPTO("chacha20-mips");
150 MODULE_ALIAS_CRYPTO("xchacha20-mips");
152 MODULE_ALIAS_CRYPTO("xchacha12-mips");
/linux-6.12.1/drivers/gpu/drm/imagination/
Dpvr_fw_mips.h19 * struct pvr_fw_mips_data - MIPS-specific data
23 * @pt_pages: Pages containing MIPS pagetable.
27 /** @pt: Pointer to CPU mapping of MIPS pagetable. */
30 /** @pt_dma_addr: DMA mappings of MIPS pagetable. */
33 /** @boot_code_dma_addr: DMA address of MIPS boot code. */
36 /** @boot_data_dma_addr: DMA address of MIPS boot data. */
39 /** @exception_code_dma_addr: DMA address of MIPS exception code. */
45 /** @pfn_mask: PFN mask for MIPS pagetable. */
Dpvr_rogue_mips.h34 /* Maximum number of page table pages (both Host and MIPS pages). */
44 /* Cached policy used by MIPS in case of physical bus on 32 bit. */
46 /* Cached policy used by MIPS in case of physical bus on more than 32 bit. */
51 /* MIPS EntryLo/PTE format. */
64 /* Mask used for the MIPS Page Table in case of physical bus on 32 bit. */
67 /* Mask used for the MIPS Page Table in case of physical bus on more than 32 bit. */
110 * that would otherwise be erroneously remapped by the MIPS wrapper.
134 * - log2 of size of the region remapped by the MIPS wrapper, i.e. number of bits from
181 /* MIPS boot stage. */
185 * MIPS private data in the bootloader data page.
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/power/
Dmti,mips-cpc.yaml4 $id: http://devicetree.org/schemas/power/mti,mips-cpc.yaml#
7 title: MIPS Cluster Power Controller
10 Defines a location of the MIPS Cluster Power Controller registers.
17 const: mti,mips-cpc
22 used to map the MIPS CPC registers block.
34 compatible = "mti,mips-cpc";
/linux-6.12.1/Documentation/devicetree/bindings/bus/
Dmti,mips-cdmm.yaml4 $id: http://devicetree.org/schemas/bus/mti,mips-cdmm.yaml#
7 title: MIPS Common Device Memory Map
10 Defines a location of the MIPS Common Device Memory Map registers.
17 const: mti,mips-cdmm
22 used to map the MIPS CDMM registers block.
34 compatible = "mti,mips-cdmm";
/linux-6.12.1/arch/mips/ralink/
DPlatform4 cflags-$(CONFIG_RALINK) += -I$(srctree)/arch/mips/include/asm/mach-ralink
10 cflags-$(CONFIG_SOC_RT288X) += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt288x
16 cflags-$(CONFIG_SOC_RT305X) += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt305x
22 cflags-$(CONFIG_SOC_RT3883) += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt3883
28 cflags-$(CONFIG_SOC_MT7620) += -I$(srctree)/arch/mips/include/asm/mach-ralink/mt7620
33 cflags-$(CONFIG_SOC_MT7621) += -I$(srctree)/arch/mips/include/asm/mach-ralink/mt7621
/linux-6.12.1/arch/mips/kernel/
Dvmlinux.lds.S22 #undef mips
23 #define mips mips macro
24 OUTPUT_ARCH(mips)
124 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
126 KEEP(*(.mips.machines.init))
212 /* This is the MIPS specific mdebug section. */
235 *(.MIPS.abiflags)
236 *(.MIPS.options)
/linux-6.12.1/arch/mips/include/asm/
Disa-rev.h3 * Copyright (C) 2018 MIPS Tech, LLC
4 * Author: Matt Redfearn <matt.redfearn@mips.com>
11 * The ISA revision level. This is 0 for MIPS I to V and N for
12 * MIPS{32,64}rN.
19 /* The compiler hasn't defined the isa rev so assume it's MIPS I - V (0) */
/linux-6.12.1/tools/testing/selftests/rseq/
Drseq-mips.h3 * Author: Paul Burton <paul.burton@mips.com>
4 * (C) Copyright 2018 MIPS Tech LLC
11 * On MIPS:
39 /* Unknown MIPS architecture. */
155 #include "rseq-mips-bits.h"
159 #include "rseq-mips-bits.h"
167 #include "rseq-mips-bits.h"
171 #include "rseq-mips-bits.h"
179 #include "rseq-mips-bits.h"
/linux-6.12.1/include/linux/bcma/
Dbcma_driver_mips.h6 /* which sbflags get routed to mips interrupt 1 */
9 /* which sbflags get routed to mips interrupt 2 */
12 /* which sbflags get routed to mips interrupt 3 */
15 /* which sbflags get routed to mips interrupt 4 */
19 /* MIPS 74K core registers */
/linux-6.12.1/Documentation/devicetree/bindings/mips/brcm/
Dsoc.yaml4 $id: http://devicetree.org/schemas/mips/brcm/soc.yaml#
52 mips-hpt-frequency:
53 description: MIPS counter high precision timer frequency.
71 $ref: /schemas/mips/cpus.yaml#
75 - mips-hpt-frequency
105 mips-hpt-frequency = <150000000>;
/linux-6.12.1/arch/mips/pci/
Dpci-malta.c3 * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
5 * Authors: Carsten Langgaard <carstenl@mips.com>
6 * Maciej W. Rozycki <macro@mips.com>
8 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
10 * MIPS boards specific PCI support.
18 #include <asm/mips-cps.h>
19 #include <asm/mips-boards/generic.h>
20 #include <asm/mips-boards/bonito64.h>
21 #include <asm/mips-boards/msc01_pci.h>
89 * fixed in a later revision of YAMON (the MIPS boards in mips_pcibios_init()
/linux-6.12.1/drivers/ssb/
DKconfig35 depends on SSB && (PCI = y || PCI = SSB) && (PCI_DRIVERS_LEGACY || !MIPS)
119 bool "SSB Broadcom MIPS core driver"
120 depends on SSB && MIPS
125 Broadcom MIPS core.
134 # Assumption: We are on embedded, if we compile the MIPS core.
152 depends on SSB_PCIHOST_POSSIBLE && SSB_EMBEDDED && MIPS
/linux-6.12.1/sound/mips/
DKconfig2 # ALSA MIPS drivers
5 bool "MIPS sound devices"
6 depends on MIPS
9 Support for sound devices of MIPS architectures.
/linux-6.12.1/drivers/irqchip/
Dirq-mips-cpu.c7 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
8 * Author: Maciej W. Rozycki <macro@mips.com>
10 * This file define the irq handler for MIPS CPU interrupts.
14 * Almost all MIPS CPUs define 8 interrupt sources. They are typically
53 .name = "MIPS",
113 .name = "MIPS",
247 panic("Failed to add MIPS CPU IPI domain"); in mips_cpu_register_ipi_domain()
267 panic("Failed to add irqdomain for MIPS CPU"); in __mips_cpu_irq_init()
271 * for CPUs which implement the MIPS MT (multi-threading) ASE. in __mips_cpu_irq_init()
/linux-6.12.1/arch/mips/include/asm/mips-boards/
Dgeneric.h6 * Defines of the MIPS boards specific address-MAP, registers, etc.
8 * Copyright (C) 2000,2012 MIPS Technologies, Inc.
10 * Authors: Carsten Langgaard <carstenl@mips.com>
11 * Steven J. Hill <sjhill@mips.com>
18 #include <asm/mips-boards/bonito64.h>
/linux-6.12.1/drivers/platform/mips/
DKconfig3 # MIPS Platform Specific Drivers
7 bool "MIPS Platform Specific Device Drivers"
9 depends on MIPS
12 MIPS platforms, including vendor-specific netbook/laptop/desktop
/linux-6.12.1/arch/mips/mti-malta/
Dmalta-int.c6 * Carsten Langgaard, carstenl@mips.com
7 * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
11 * Routines for generic manipulation of the interrupts found on the MIPS
31 #include <asm/mips-boards/malta.h>
32 #include <asm/mips-boards/maltaint.h>
33 #include <asm/mips-cps.h>
35 #include <asm/mips-boards/generic.h>
36 #include <asm/mips-boards/msc01_pci.h>

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