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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dbrcm,iproc-clocks.yaml16 LCPLL0, MIPIPLL, and etc., all derived from an onboard crystal. Each PLL
29 - brcm,cygnus-mipipll
96 - brcm,cygnus-mipipll
133 mipipll crystal 0 BCM_CYGNUS_MIPIPLL
134 ch0_unused mipipll 1 BCM_CYGNUS_MIPIPLL_CH0_UNUSED
135 ch1_lcd mipipll 2 BCM_CYGNUS_MIPIPLL_CH1_LCD
136 ch2_v3d mipipll 3 BCM_CYGNUS_MIPIPLL_CH2_V3D
137 ch3_unused mipipll 4 BCM_CYGNUS_MIPIPLL_CH3_UNUSED
138 ch4_unused mipipll 5 BCM_CYGNUS_MIPIPLL_CH4_UNUSED
139 ch5_unused mipipll 6 BCM_CYGNUS_MIPIPLL_CH5_UNUSED
/linux-6.12.1/arch/arm/boot/dts/broadcom/
Dbcm-cygnus-clock.dtsi106 mipipll: mipipll@180a9800 { label
108 compatible = "brcm,cygnus-mipipll";
111 clock-output-names = "mipipll", "ch0_unused", "ch1_lcd",
Dbcm911360_entphn.dts75 <&mipipll BCM_CYGNUS_MIPIPLL>,
76 <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>;
Dbcm-cygnus.dtsi505 clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>;
/linux-6.12.1/drivers/clk/bcm/
Dclk-cygnus.c183 static const struct iproc_pll_ctrl mipipll = { variable
238 iproc_pll_clk_setup(node, &mipipll, mipipll_vco_params, in cygnus_mipipll_clk_init()
242 CLK_OF_DECLARE(cygnus_mipipll, "brcm,cygnus-mipipll", cygnus_mipipll_clk_init);
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt2701.c116 FACTOR(CLK_TOP_MIPIPLL, "mipipll", "dpi_ck", 1, 1),
275 "mipipll",
293 "mipipll",