Home
last modified time | relevance | path

Searched +full:loongson +full:- +full:3 (Results 1 – 25 of 239) sorted by relevance

12345678910

/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,liointc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Local I/O Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips and
14 Loongson-2K series chips, as the primary package interrupt controller which
17 1.The Loongson-2K0500 is a single core CPU;
18 2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we
[all …]
Dloongson,eiointc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Extended I/O Interrupt Controller
10 - Binbin Zhou <zhoubinbin@loongson.cn>
13 This interrupt controller is found on the Loongson-3 family chips and
14 Loongson-2K series chips and is used to distribute interrupts directly to
18 - $ref: /schemas/interrupt-controller.yaml#
23 - loongson,ls2k0500-eiointc
[all …]
Dloongson,htvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Vector Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips for
18 const: loongson,htvec-1.0
28 interrupt-controller: true
30 '#interrupt-cells':
[all …]
Dloongson,htpic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 - $ref: /schemas/interrupt-controller.yaml#
16 This interrupt controller is found in the Loongson-3 family of chips to transmit
21 const: loongson,htpic-1.0
32 interrupt-controller: true
[all …]
/linux-6.12.1/arch/loongarch/boot/dts/
Dloongson-2k2000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "loongson,la364";
[all …]
Dloongson-2k1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
[all …]
Dloongson-2k0500.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "loongson,la264";
[all …]
/linux-6.12.1/drivers/platform/mips/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 MIPS platforms, including vendor-specific netbook/laptop/desktop
21 bool "Loongson-3 CPU HWMon Driver"
26 Loongson-3A/3B CPU Hwmon (temperature sensor) driver.
29 bool "Loongson RS780E ACPI Controller"
32 Loongson RS780E PCH ACPI Controller driver.
35 bool "Loongson-2K1000 Reset Controller"
38 Loongson-2K1000 Reset Controller driver.
/linux-6.12.1/Documentation/arch/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Currently, LoongArch based processors (e.g. Loongson-3A5000) can only work together
10 I/O Interrupt Controller), HTVECINTC (Hyper-Transport Vector Interrupt Controller),
11 PCH-PIC (Main Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller
12 in LS7A chipset) and PCH-MSI (MSI Interrupt Controller).
14 CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package
15 controllers (in CPU), while PCH-PIC/PCH-LPC/PCH-MSI are controllers out of CPU (i.e.,
22 In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
24 interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go
27 +-----+ +---------+ +-------+
[all …]
Dintroduction.rst1 .. SPDX-License-Identifier: GPL-2.0
7 LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. There are
8 currently 3 variants: a reduced 32-bit version (LA32R), a standard 32-bit
9 version (LA32S) and a 64-bit version (LA64). There are 4 privilege levels
22 ----
24 LoongArch has 32 GPRs ( ``$r0`` ~ ``$r31`` ); each one is 32-bit wide in LA32
25 and 64-bit wide in LA64. ``$r0`` is hard-wired to zero, and the other registers
26 are not architecturally special. (Except ``$r1``, which is hard-wired as the
30 the LoongArch ELF psABI spec, in :ref:`References <loongarch-references>`:
40 ``$r4``-``$r11`` ``$a0``-``$a7`` Argument registers No
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dloongson.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/loongson.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson PCI Host Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 PCI host controller found on Loongson PCHs and SoCs.
16 - $ref: /schemas/pci/pci-host-bridge.yaml#
21 - loongson,ls2k-pci
22 - loongson,ls7a-pci
[all …]
/linux-6.12.1/arch/mips/include/asm/mach-loongson64/
Dkernel-entry-init.h7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
28 /* Loongson-3A R4+ */
33 /* Loongson-3A R2/R3 */
59 /* Loongson-3A R4+ */
64 /* Loongson-3A R2/R3 */
91 b 2f /* Loongson-3A1000/3A2000/3A3000/3A4000 */
92 1: dins a0, t2, 14, 2 /* Loongson-3B1000/3B1500 need bit 15~14 */
94 3: addiu t9, -1 /* limit mailbox access */
95 bnez t9, 3b
/linux-6.12.1/Documentation/translations/zh_TW/arch/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_TW.rst
5 :Original: Documentation/arch/loongarch/irq-chip-model.rst
6 :Translator: Huacai Chen <chenhuacai@loongson.cn>
15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片組的主中
16 斷控制器）、PCH-LPC（LS7A芯片組的LPC中斷控制器）和PCH-MSI（MSI中斷控制器）。
19 全局中斷控制器（每個芯片一個，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
26 在這種模型裏面，IPI（Inter-Processor Interrupt）和CPU本地時鐘中斷直接發送到CPUINTC，
27 CPU串口（UARTs）中斷髮送到LIOINTC，而其他所有設備的中斷則分別發送到所連接的PCH-PIC/
28 PCH-LPC/PCH-MSI，然後被HTVECINTC統一收集，再發送到LIOINTC，最後到達CPUINTC::
[all …]
Dintroduction.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_TW.rst
6 :Translator: Huacai Chen <chenhuacai@loongson.cn>
12 LoongArch是一種新的RISC ISA，在一定程度上類似於MIPS和RISC-V。LoongArch指令集
25 ----------
32 :ref:`參考文獻 <loongarch-references-zh_TW>`:
41 ``$r4``-``$r11`` ``$a0``-``$a7`` 參數寄存器 否
42 ``$r4``-``$r5`` ``$v0``-``$v1`` 返回值 否
43 ``$r12``-``$r20`` ``$t0``-``$t8`` 臨時寄存器 否
46 ``$r23``-``$r31`` ``$s0``-``$s8`` 靜態寄存器 是
[all …]
/linux-6.12.1/arch/mips/boot/dts/loongson/
Dloongson64-2k1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
8 compatible = "loongson,loongson2k1000";
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "loongson,gs264";
21 #clock-cells = <1>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/dma/
Dloongson,ls1b-apbdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/loongson,ls1b-apbdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 APB DMA Controller
10 - Keguang Zhang <keguang.zhang@gmail.com>
13 Loongson-1 APB DMA controller provides 3 independent channels for
19 - const: loongson,ls1b-apbdma
20 - items:
21 - enum:
[all …]
/linux-6.12.1/Documentation/translations/zh_CN/arch/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_CN.rst
5 :Original: Documentation/arch/loongarch/irq-chip-model.rst
6 :Translator: Huacai Chen <chenhuacai@loongson.cn>
15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片组的主中
16 断控制器）、PCH-LPC（LS7A芯片组的LPC中断控制器）和PCH-MSI（MSI中断控制器）。
19 全局中断控制器（每个芯片一个，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
26 在这种模型里面，IPI（Inter-Processor Interrupt）和CPU本地时钟中断直接发送到CPUINTC，
27 CPU串口（UARTs）中断发送到LIOINTC，而其他所有设备的中断则分别发送到所连接的PCH-PIC/
28 PCH-LPC/PCH-MSI，然后被HTVECINTC统一收集，再发送到LIOINTC，最后到达CPUINTC::
[all …]
Dintroduction.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_CN.rst
6 :Translator: Huacai Chen <chenhuacai@loongson.cn>
12 LoongArch是一种新的RISC ISA，在一定程度上类似于MIPS和RISC-V。LoongArch指令集
25 ----------
32 :ref:`参考文献 <loongarch-references-zh_CN>`:
41 ``$r4``-``$r11`` ``$a0``-``$a7`` 参数寄存器 否
42 ``$r4``-``$r5`` ``$v0``-``$v1`` 返回值 否
43 ``$r12``-``$r20`` ``$t0``-``$t8`` 临时寄存器 否
46 ``$r23``-``$r31`` ``$s0``-``$s8`` 静态寄存器 是
[all …]
/linux-6.12.1/arch/mips/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
143 bool "Generic board-agnostic MIPS kernel"
285 Build a generic DT-based kernel image that boots on select
286 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
378 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
379 DECstation porting pages on <http://decstation.unix-ag.org/>.
418 Olivetti M700-10 workstations.
455 bool "Loongson 32-bit family of machines"
458 This enables support for the Loongson-1 family of machines.
460 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
[all …]
/linux-6.12.1/drivers/gpio/
Dgpio-loongson.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loongson-2F/3A/3B GPIO Support
6 * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com>
20 #include <loongson.h>
97 struct device *dev = &pdev->dev; in loongson_gpio_probe()
101 return -ENOMEM; in loongson_gpio_probe()
103 gc->label = "loongson-gpio-chip"; in loongson_gpio_probe()
104 gc->base = 0; in loongson_gpio_probe()
105 gc->ngpio = LOONGSON_N_GPIO; in loongson_gpio_probe()
106 gc->get = loongson_gpio_get_value; in loongson_gpio_probe()
[all …]
/linux-6.12.1/drivers/irqchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
119 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
127 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
180 will be called irq-lan966x-oic.
221 bool "J-Core integrated AIC" if COMPILE_TEST
225 Support for the J-Core integrated AIC.
236 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
239 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
244 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
294 tristate "TS-4800 IRQ controller"
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mips/loongson/
Drs780e-acpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mips/loongson/rs780e-acpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson RS780E PCH ACPI Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This controller can be found in Loongson-3 systems with RS780E PCH.
17 const: loongson,rs780e-acpi
23 - compatible
24 - reg
[all …]
/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-loongson1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loongson-1 DWMAC glue layer
5 * Copyright (C) 2011-2023 Keguang Zhang <keguang.zhang@gmail.com>
21 /* Loongson-1 SYSCON Registers */
25 /* Loongson-1B SYSCON Register Bits */
27 #define GMAC1_USE_UART0 BIT(3)
32 #define GMAC1_USE_TXCLK BIT(3)
37 /* Loongson-1C SYSCON Register Bits */
52 struct plat_stmmacenet_data *plat = dwmac->plat_dat; in ls1b_dwmac_syscon_init()
53 struct regmap *regmap = dwmac->regmap; in ls1b_dwmac_syscon_init()
[all …]
/linux-6.12.1/drivers/pci/controller/
Dpci-loongson.c1 // SPDX-License-Identifier: GPL-2.0
3 * Loongson PCI Host Controller Driver
12 #include <linux/pci-acpi.h>
13 #include <linux/pci-ecam.h>
41 #define FLAG_DEV_HIDDEN BIT(3)
58 dev->class = PCI_CLASS_BRIDGE_PCI_NORMAL; in bridge_class_quirk()
73 pdev->mmio_always_on = 1; in system_bus_quirk()
74 pdev->non_compliant_bars = 1; in system_bus_quirk()
84 * Some Loongson PCIe ports have hardware limitations on their Maximum Read
87 * bridges. However, some MIPS Loongson firmware doesn't set MRRS properly,
[all …]
/linux-6.12.1/drivers/cpufreq/
Dloongson3_cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * CPUFreq driver for the Loongson-3 processors.
5 * All revisions of Loongson-3 processor support cpu_has_scalefreq feature.
7 * Author: Huacai Chen <chenhuacai@loongson.cn>
8 * Copyright (C) 2024 Loongson Technology Corporation Limited
18 #include <asm/loongson.h>
37 #define CMD_INVAL 3 /* Invalid Parameter */
41 * CMD_GET_VERSION - Get interface version
49 * CMD_GET_FEATURE - Get feature state
56 * CMD_SET_FEATURE - Set feature state
[all …]

12345678910