| /linux-6.12.1/drivers/clk/starfive/ |
| D | Kconfig | 25 bool "StarFive JH7110 PLL clock support"
30 StarFive JH7110 SoC.
33 bool "StarFive JH7110 system clock support"
42 StarFive JH7110 SoC.
45 tristate "StarFive JH7110 always-on clock support"
50 StarFive JH7110 SoC.
53 tristate "StarFive JH7110 System-Top-Group clock support"
58 on the StarFive JH7110 SoC.
61 tristate "StarFive JH7110 Image-Signal-Process clock support"
66 on the StarFive JH7110 SoC.
[all …]
|
| D | Makefile | 7 obj-$(CONFIG_CLK_STARFIVE_JH7110_PLL) += clk-starfive-jh7110-pll.o
8 obj-$(CONFIG_CLK_STARFIVE_JH7110_SYS) += clk-starfive-jh7110-sys.o
9 obj-$(CONFIG_CLK_STARFIVE_JH7110_AON) += clk-starfive-jh7110-aon.o
10 obj-$(CONFIG_CLK_STARFIVE_JH7110_STG) += clk-starfive-jh7110-stg.o
11 obj-$(CONFIG_CLK_STARFIVE_JH7110_ISP) += clk-starfive-jh7110-isp.o
12 obj-$(CONFIG_CLK_STARFIVE_JH7110_VOUT) += clk-starfive-jh7110-vout.o
|
| /linux-6.12.1/Documentation/devicetree/bindings/soc/starfive/ |
| D | starfive,jh7110-syscon.yaml | 4 $id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
7 title: StarFive JH7110 SoC system controller
13 The StarFive JH7110 SoC system controller provides register information such
20 - const: starfive,jh7110-sys-syscon
25 - starfive,jh7110-aon-syscon
26 - starfive,jh7110-stg-syscon
33 $ref: /schemas/clock/starfive,jh7110-pll.yaml#
48 const: starfive,jh7110-sys-syscon
59 const: starfive,jh7110-aon-syscon
72 compatible = "starfive,jh7110-stg-syscon", "syscon";
[all …]
|
| /linux-6.12.1/drivers/phy/starfive/ |
| D | Kconfig | 9 tristate "StarFive JH7110 D-PHY RX support"
16 phy-jh7110-dphy-rx.ko.
19 tristate "StarFive JH7110 D-PHY TX Support"
26 phy-jh7110-dphy-tx.ko.
29 tristate "Starfive JH7110 PCIE 2.0/USB 3.0 PHY support"
36 phy-jh7110-pcie.ko.
39 tristate "Starfive JH7110 USB 2.0 PHY support"
46 phy-jh7110-usb.ko.
|
| D | Makefile | 2 obj-$(CONFIG_PHY_STARFIVE_JH7110_DPHY_RX) += phy-jh7110-dphy-rx.o
3 obj-$(CONFIG_PHY_STARFIVE_JH7110_DPHY_TX) += phy-jh7110-dphy-tx.o
4 obj-$(CONFIG_PHY_STARFIVE_JH7110_PCIE) += phy-jh7110-pcie.o
5 obj-$(CONFIG_PHY_STARFIVE_JH7110_USB) += phy-jh7110-usb.o
|
| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | starfive,jh7110-voutcrg.yaml | 4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-voutcrg.yaml#
7 title: StarFive JH7110 Video-Output Clock and Reset Generator
14 const: starfive,jh7110-voutcrg
44 See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
49 See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
70 #include <dt-bindings/clock/starfive,jh7110-crg.h>
71 #include <dt-bindings/power/starfive,jh7110-pmu.h>
72 #include <dt-bindings/reset/starfive,jh7110-crg.h>
75 compatible = "starfive,jh7110-voutcrg";
|
| D | starfive,jh7110-ispcrg.yaml | 4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-ispcrg.yaml#
7 title: StarFive JH7110 Image-Signal-Process Clock and Reset Generator
14 const: starfive,jh7110-ispcrg
42 See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
47 See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
68 #include <dt-bindings/clock/starfive,jh7110-crg.h>
69 #include <dt-bindings/power/starfive,jh7110-pmu.h>
70 #include <dt-bindings/reset/starfive,jh7110-crg.h>
73 compatible = "starfive,jh7110-ispcrg";
|
| D | starfive,jh7110-stgcrg.yaml | 4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-stgcrg.yaml#
7 title: StarFive JH7110 System-Top-Group Clock and Reset Generator
14 const: starfive,jh7110-stgcrg
44 See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
49 See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
63 #include <dt-bindings/clock/starfive,jh7110-crg.h>
66 compatible = "starfive,jh7110-stgcrg";
|
| D | starfive,jh7110-pll.yaml | 4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-pll.yaml#
7 title: StarFive JH7110 PLL Clock Generator
10 These PLLs are high speed, low jitter frequency synthesizers in the JH7110.
22 const: starfive,jh7110-pll
31 See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
43 compatible = "starfive,jh7110-pll";
|
| D | starfive,jh7110-aoncrg.yaml | 4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#
7 title: StarFive JH7110 Always-On Clock and Reset Generator
14 const: starfive,jh7110-aoncrg
71 See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
76 See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
90 #include <dt-bindings/clock/starfive,jh7110-crg.h>
93 compatible = "starfive,jh7110-aoncrg";
|
| D | starfive,jh7110-syscrg.yaml | 4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
7 title: StarFive JH7110 System Clock and Reset Generator
14 const: starfive,jh7110-syscrg
82 See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
87 See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
102 compatible = "starfive,jh7110-syscrg";
|
| /linux-6.12.1/drivers/crypto/starfive/ |
| D | Makefile | 3 obj-$(CONFIG_CRYPTO_DEV_JH7110) += jh7110-crypto.o
4 jh7110-crypto-objs := jh7110-cryp.o jh7110-hash.o jh7110-rsa.o jh7110-aes.o
|
| /linux-6.12.1/arch/riscv/boot/dts/starfive/ |
| D | jh7110.dtsi | 8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
14 compatible = "starfive,jh7110";
355 compatible = "starfive,jh7110-clint", "sifive,clint0";
365 compatible = "starfive,jh7110-ccache", "sifive,ccache0", "cache";
376 compatible = "starfive,jh7110-plic", "sifive,plic-1.0.0";
390 compatible = "starfive,jh7110-uart", "snps,dw-apb-uart";
404 compatible = "starfive,jh7110-uart", "snps,dw-apb-uart";
418 compatible = "starfive,jh7110-uart", "snps,dw-apb-uart";
[all …]
|
| D | Makefile | 11 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
12 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
13 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
14 dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
|
| /linux-6.12.1/Documentation/devicetree/bindings/power/ |
| D | starfive,jh7110-pmu.yaml | 4 $id: http://devicetree.org/schemas/power/starfive,jh7110-pmu.yaml#
7 title: StarFive JH7110 Power Management Unit
13 StarFive JH7110 SoC includes support for multiple power domains which can be
19 - starfive,jh7110-pmu
41 compatible = "starfive,jh7110-pmu";
|
| /linux-6.12.1/Documentation/devicetree/bindings/net/ |
| D | starfive,jh7110-dwmac.yaml | 5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
8 title: StarFive JH7110 DWMAC glue layer
20 - starfive,jh7110-dwmac
31 - const: starfive,jh7110-dwmac
35 - const: starfive,jh7110-dwmac
112 const: starfive,jh7110-dwmac
148 compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
|
| /linux-6.12.1/Documentation/devicetree/bindings/sound/ |
| D | starfive,jh7110-pwmdac.yaml | 4 $id: http://devicetree.org/schemas/sound/starfive,jh7110-pwmdac.yaml#
7 title: StarFive JH7110 PWM-DAC Controller
11 form a DAC for audio play in StarFive JH7110 SoC. This audio play controller
23 const: starfive,jh7110-pwmdac
67 compatible = "starfive,jh7110-pwmdac";
|
| D | starfive,jh7110-tdm.yaml | 4 $id: http://devicetree.org/schemas/sound/starfive,jh7110-tdm.yaml#
7 title: StarFive JH7110 TDM Controller
11 integrated in StarFive JH7110 SoC, allowing up to 8 channels of
24 - starfive,jh7110-tdm
81 compatible = "starfive,jh7110-tdm";
|
| D | snps,designware-i2s.yaml | 20 - starfive,jh7110-i2stx0
21 - starfive,jh7110-i2stx1
22 - starfive,jh7110-i2srx
126 const: starfive,jh7110-i2stx0
141 const: starfive,jh7110-i2stx1
156 const: starfive,jh7110-i2srx
|
| /linux-6.12.1/Documentation/devicetree/bindings/watchdog/ |
| D | starfive,jh7100-wdt.yaml | 7 title: StarFive Watchdog for JH7100 and JH7110 SoC
14 The JH7100 and JH7110 watchdog both are 32 bit counters. JH7100 watchdog
15 has only one timeout phase and reboots. And JH7110 watchdog has two
27 - starfive,jh7110-wdt
31 - const: starfive,jh7110-wdt
|
| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | starfive,jh7110-usb-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/starfive,jh7110-usb-phy.yaml#
7 title: StarFive JH7110 USB 2.0 PHY
14 const: starfive,jh7110-usb-phy
44 compatible = "starfive,jh7110-usb-phy";
|
| D | starfive,jh7110-dphy-rx.yaml | 4 $id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-rx.yaml#
7 title: StarFive SoC JH7110 MIPI D-PHY Rx Controller
19 const: starfive,jh7110-dphy-rx
61 compatible = "starfive,jh7110-dphy-rx";
|
| /linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
| D | starfive,jh7110-aon-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-aon-pinctrl.yaml#
7 title: StarFive JH7110 AON Pin Controller
10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.
22 const: starfive,jh7110-aon-pinctrl
103 compatible = "starfive,jh7110-aon-pinctrl";
|
| /linux-6.12.1/Documentation/devicetree/bindings/rng/ |
| D | starfive,jh7110-trng.yaml | 4 $id: http://devicetree.org/schemas/rng/starfive,jh7110-trng.yaml#
17 - const: starfive,jh7110-trng
18 - const: starfive,jh7110-trng
52 compatible = "starfive,jh7110-trng";
|
| /linux-6.12.1/drivers/pinctrl/starfive/ |
| D | Kconfig | 30 tristate "System pinctrl and GPIO driver for the StarFive JH7110 SoC"
36 Say yes here to support system pin control on the StarFive JH7110 SoC.
42 tristate "Always-on pinctrl and GPIO driver for the StarFive JH7110 SoC"
48 Say yes here to support always-on pin control on the StarFive JH7110 SoC.
|