Home
last modified time | relevance | path

Searched +full:in2 +full:- (Results 1 – 25 of 153) sorted by relevance

1234567

/linux-6.12.1/arch/arm64/crypto/
Daes-cipher-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
31 * 32-bit quantities, i.e., 'ldrb w12, [tt, w12, uxtw #2]' is not a
56 .macro __hround, out0, out1, in0, in1, in2, in3, t0, t1, enc, sz, op
60 __pair\enc \sz, \op, w14, w15, \in1, \in2, \in0, 8
61 __pair\enc \sz, \op, w16, w17, \in2, \in3, \in1, 16
62 __pair\enc \sz, \op, \t0, \t1, \in3, \in0, \in2, 24
74 .macro fround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op
75 __hround \out0, \out1, \in0, \in1, \in2, \in3, \out2, \out3, 1, \sz, \op
76 __hround \out2, \out3, \in2, \in3, \in0, \in1, \in1, \in2, 1, \sz, \op
79 .macro iround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op
[all …]
Daes-neon.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm64/crypto/aes-neon.S - AES cipher for ARMv8 NEON
5 * Copyright (C) 2013 - 2017 Linaro Ltd. <ard.biesheuvel@linaro.org>
22 /* special case for the neon-bs driver calling into this one for CTS */
49 ld1 {v16.16b-v19.16b}, [\temp], #64
50 ld1 {v20.16b-v23.16b}, [\temp], #64
51 ld1 {v24.16b-v27.16b}, [\temp], #64
52 ld1 {v28.16b-v31.16b}, [\temp]
72 tbl \in\().16b, {v16.16b-v19.16b}, \in\().16b
74 tbx \in\().16b, {v20.16b-v23.16b}, v9.16b
[all …]
/linux-6.12.1/arch/arm/crypto/
Daes-cipher-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
36 ldr\op \out, [ttab, \in, lsr #(8 * \idx) - \sz]
42 .macro __hround, out0, out1, in0, in1, in2, in3, t3, t4, enc, sz, op, oldcpsr
50 __select t1, \in2, 1
56 __select t2, \in2, 2
68 __select \t4, \in2, 3
76 * This is the final round and we're done with all data-dependent table
77 * lookups, so we can safely re-enable interrupts.
92 .macro fround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op, oldcpsr
93 __hround \out0, \out1, \in0, \in1, \in2, \in3, \out2, \out3, 1, \sz, \op
[all …]
Dghash-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2015 - 2017 Linaro Ltd.
12 .arch armv8-a
13 .fpu crypto-neon-fp-armv8
101 * This implementation of 64x64 -> 128 bit polynomial multiplication
102 * using vmull.p8 instructions (8x8 -> 16) is taken from the paper
105 * Ricardo Dahab (https://hal.inria.fr/hal-01506572)
107 * It has been slightly tweaked for in-order performance, and to allow
159 // PMULL (64x64->128) based reduction for CPUs that can do
175 // 64x64->128 PMULL instruction
[all …]
/linux-6.12.1/arch/mips/crypto/
Dpoly1305-mips.pl2 # SPDX-License-Identifier: GPL-1.0+ OR BSD-3-Clause
5 # Written by Andy Polyakov, @dot-asm, originally for the OpenSSL
16 # R1x000 ~5.5/+130% (big-endian)
17 # Octeon II 2.50/+70% (little-endian)
21 # Add 32-bit code path.
25 # Modulo-scheduling reduction allows to omit dependency chain at the
30 # R1x000 ~9.8/? (big-endian)
31 # Octeon II 3.65/+140% (little-endian)
32 # MT7621/1004K 4.75/? (little-endian)
48 # - never ever touch $tp, "thread pointer", former $gp [o32 can be
[all …]
/linux-6.12.1/tools/testing/selftests/bpf/prog_tests/
Dskeleton.c1 // SPDX-License-Identifier: GPL-2.0
33 if (CHECK(skel->kconfig, "skel_kconfig", "kconfig is mmaped()!\n")) in test_skeleton()
36 bss = skel->bss; in test_skeleton()
37 data = skel->data; in test_skeleton()
38 data_dyn = skel->data_dyn; in test_skeleton()
39 rodata = skel->rodata; in test_skeleton()
40 rodata_dyn = skel->rodata_dyn; in test_skeleton()
42 ASSERT_STREQ(bpf_map__name(skel->maps.rodata_dyn), ".rodata.dyn", "rodata_dyn_name"); in test_skeleton()
43 ASSERT_STREQ(bpf_map__name(skel->maps.data_dyn), ".data.dyn", "data_dyn_name"); in test_skeleton()
45 /* validate values are pre-initialized correctly */ in test_skeleton()
[all …]
/linux-6.12.1/drivers/gpu/drm/vmwgfx/
Dvmwgfx_msg_arm64.h1 // SPDX-License-Identifier: GPL-2.0 OR MIT
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
156 unsigned long vmware_hypercall_hb(unsigned long cmd, unsigned long in2, in vmware_hypercall_hb() argument
163 register u64 x2 asm("x2") = in2; in vmware_hypercall_hb()
185 unsigned long vmware_hypercall_hb_out(unsigned long cmd, unsigned long in2, in vmware_hypercall_hb_out() argument
190 return vmware_hypercall_hb(cmd, in2, in3, in4, in5, in6, out1, 0); in vmware_hypercall_hb_out()
194 unsigned long vmware_hypercall_hb_in(unsigned long cmd, unsigned long in2, in vmware_hypercall_hb_in() argument
199 return vmware_hypercall_hb(cmd, in2, in3, in4, in5, in6, out1, in vmware_hypercall_hb_in()
/linux-6.12.1/lib/crypto/
Dcurve25519-fiat32.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright (C) 2015-2016 The fiat-crypto Authors.
4 * Copyright (C) 2018-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
6 * This is a machine-generated formally verified implementation of Curve25519
7 * ECDH from: <https://github.com/mit-plv/fiat-crypto>. Though originally
9 * It is optimized for 32-bit machines and machines that cannot work efficiently
10 * with 128-bit integer types.
17 /* fe means field element. Here the field is \Z/(2^255-19). An element t,
41 h[0] = a0&((1<<26)-1); /* 26 used, 32-26 left. 26 */ in fe_frombytes_impl()
42 h[1] = (a0>>26) | ((a1&((1<<19)-1))<< 6); /* (32-26) + 19 = 6+19 = 25 */ in fe_frombytes_impl()
[all …]
/linux-6.12.1/arch/x86/crypto/
Daesni-intel_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Implement AES algorithm in Intel AES-NI instructions.
5 * The white paper of AES-NI instructions can be downloaded from:
6 * http://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf
28 #define IN2 %xmm7 macro
232 lea 240-16(TKEYP), UKEYP
295 movaps -0x60(TKEYP), KEY
297 movaps -0x50(TKEYP), KEY
301 movaps -0x40(TKEYP), KEY
303 movaps -0x30(TKEYP), KEY
[all …]
/linux-6.12.1/arch/powerpc/crypto/
Daesp8-ppc.pl2 # SPDX-License-Identifier: GPL-2.0
12 # Copyright (c) 2006-2017, CRYPTOGAMS by <appro@openssl.org>
58 # The module is endian-agnostic in sense that it supports both big-
59 # and little-endian cases. Data alignment in parallelizable modes is
64 # is aligned programmatically, which in turn guarantees exception-
72 # Add XTS subroutine, 9x on little- and 12x improvement on big-endian
76 # Current large-block performance in cycles per byte processed with
77 # 128-bit key (less is better).
79 # CBC en-/decrypt CTR XTS
106 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or
[all …]
/linux-6.12.1/security/keys/
Dkeyctl_pkey.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Public-key operation keyctls
14 #include <keys/user-type.h>
19 kfree(params->info); in keyctl_pkey_params_free()
20 key_put(params->key); in keyctl_pkey_params_free()
26 Opt_hash, /* "hash=<digest-name>" eg. "hash=sha1" */
42 char *c = params->info, *p, *q; in keyctl_pkey_params_parse()
50 return -EINVAL; in keyctl_pkey_params_parse()
52 return -EINVAL; in keyctl_pkey_params_parse()
55 return -EINVAL; in keyctl_pkey_params_parse()
[all …]
/linux-6.12.1/sound/soc/codecs/
Dmax98095.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98095.c -- MAX98095 ALSA SoC Audio driver
338 "Off", "Elliptical-HPF-16k", "Butterworth-HPF-16k",
339 "Elliptical-HPF-8k", "Butterworth-HPF-8k", "Butterworth-HPF-Fs/240"};
355 unsigned int sel = ucontrol->value.integer.value[0]; in max98095_mic1pre_set()
357 max98095->mic1pre = sel; in max98095_mic1pre_set()
370 ucontrol->value.integer.value[0] = max98095->mic1pre; in max98095_mic1pre_get()
379 unsigned int sel = ucontrol->value.integer.value[0]; in max98095_mic2pre_set()
381 max98095->mic2pre = sel; in max98095_mic2pre_set()
394 ucontrol->value.integer.value[0] = max98095->mic2pre; in max98095_mic2pre_get()
[all …]
Dwm9090.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2009-12 Wolfson Microelectronics
25 { 1, 0x0006 }, /* R1 - Power Management (1) */
26 { 2, 0x6000 }, /* R2 - Power Management (2) */
27 { 3, 0x0000 }, /* R3 - Power Management (3) */
28 { 6, 0x01C0 }, /* R6 - Clocking 1 */
29 { 22, 0x0003 }, /* R22 - IN1 Line Control */
30 { 23, 0x0003 }, /* R23 - IN2 Line Control */
31 { 24, 0x0083 }, /* R24 - IN1 Line Input A Volume */
32 { 25, 0x0083 }, /* R25 - IN1 Line Input B Volume */
[all …]
Dwm8998.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8998.c -- ALSA SoC Audio driver for WM8998 codecs
41 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wm8998_asrc_ev()
57 dev_warn(component->dev, in wm8998_asrc_ev()
60 return -EINVAL; in wm8998_asrc_ev()
64 dev_err(component->dev, in wm8998_asrc_ev()
67 return -EINVAL; in wm8998_asrc_ev()
77 val -= 0x8; in wm8998_asrc_ev()
81 dev_warn(component->dev, in wm8998_asrc_ev()
84 return -EINVAL; in wm8998_asrc_ev()
[all …]
Dtlv320adcx140.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
40 "ti,gpo-config-1",
41 "ti,gpo-config-2",
42 "ti,gpo-config-3",
43 "ti,gpo-config-4",
162 /* Digital Volume control. From -100 to 27 dB in 0.5 dB steps */
163 static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10050, 50, 0);
168 /* DRE Level. From -12 dB to -66 dB in 1 dB steps */
169 static DECLARE_TLV_DB_SCALE(dre_thresh_tlv, -6600, 100, 0);
[all …]
Dsimple-mux.c1 // SPDX-License-Identifier: GPL-2.0-only
39 ucontrol->value.enumerated.item[0] = priv->mux; in simple_mux_control_get()
48 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in simple_mux_control_put()
52 if (ucontrol->value.enumerated.item[0] > e->items) in simple_mux_control_put()
53 return -EINVAL; in simple_mux_control_put()
55 if (priv->mux == ucontrol->value.enumerated.item[0]) in simple_mux_control_put()
58 priv->mux = ucontrol->value.enumerated.item[0]; in simple_mux_control_put()
60 gpiod_set_value_cansleep(priv->gpiod_mux, priv->mux); in simple_mux_control_put()
63 ucontrol->value.enumerated.item[0], in simple_mux_control_put()
72 return priv->mux; in simple_mux_read()
[all …]
/linux-6.12.1/Documentation/hwmon/
Dpowr1220.rst19 -----------
26 Voltages are sampled by a 12-bit ADC with a step size of 2 mV.
27 An in-line attenuator allows measurements from 0 to 6 V. The
39 in2 VMON3
40 in2 VMON4
Dw83795.rst10 Addresses scanned: I2C 0x2c - 0x2f
18 Addresses scanned: I2C 0x2c - 0x2f
23 - Wei Song (Nuvoton)
24 - Jean Delvare <jdelvare@suse.de>
28 -----------
35 - W83795G
42 15 VSEN3 (VCORE3) 12h in2
94 - W83795ADG
101 12 VSEN3 (VCORE3) 12h in2
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Drt5651.txt7 - compatible : "realtek,rt5651".
9 - reg : The I2C address of the device.
13 - realtek,in2-differential
14 Boolean. Indicate MIC2 input are differential, rather than single-ended.
16 - realtek,dmic-en
19 - realtek,jack-detect-source
21 1: Use JD1_1 pin for jack-detect
22 2: Use JD1_2 pin for jack-detect
23 3: Use JD2 pin for jack-detect
25 - realtek,jack-detect-not-inverted
[all …]
Daxentia,tse850-pcm5142.txt1 Devicetree bindings for the Axentia TSE-850 audio complex
4 - compatible: "axentia,tse850-pcm5142"
5 - axentia,cpu-dai: The phandle of the cpu dai.
6 - axentia,audio-codec: The phandle of the PCM5142 codec.
7 - axentia,add-gpios: gpio specifier that controls the mixer.
8 - axentia,loop1-gpios: gpio specifier that controls loop relays on channel 1.
9 - axentia,loop2-gpios: gpio specifier that controls loop relays on channel 2.
10 - axentia,ana-supply: Regulator that supplies the output amplifier. Must
11 support voltages in the 2V - 20V range, in 1V steps.
16 IN1 +---o +------------+ o---+ OUT1
[all …]
/linux-6.12.1/sound/soc/atmel/
Dtse850-pcm5142.c1 // SPDX-License-Identifier: GPL-2.0
3 // TSE-850 audio - ASoC driver for the Axentia TSE-850 with a PCM5142 codec
10 // IN1 +---o +------------+ o---+ OUT1
14 // +--o +--. |
17 // | .---. |
18 // DAC +----------->|Sum|---+
19 // | '---' |
23 // IN2 +---o--+------------+--o---+ OUT2
33 // 'loop2' relays are active, short-cutting the TSE-850 from channel 2.
34 // IN1, IN2, OUT1 and OUT2 are TSE-850 connectors and DAC is the PCB name
[all …]
/linux-6.12.1/tools/testing/selftests/bpf/progs/
Dtest_skeleton.c1 // SPDX-License-Identifier: GPL-2.0
16 int in1 = -1;
17 long long in2 = -1; variable
30 int out1 = -1;
31 long long out2 = -1;
47 const volatile int in_dynarr[4] SEC(".rodata.dyn") = { -1, -2, -3, -4 };
56 /* non-mmapable custom .data section */
76 out2 = in2; in handler()
90 huge_arr[sizeof(huge_arr) - 1] = 123; in handler()
/linux-6.12.1/arch/x86/include/asm/
Dvmware.h1 /* SPDX-License-Identifier: GPL-2.0 or MIT */
12 * - Low bandwidth (LB) hypercalls (I/O port based, vmcall and vmmcall)
17 * arg0 - VMWARE_HYPERVISOR_MAGIC
18 * arg2 - Hypercall command
19 * arg3 bits [15:0] - Port number, LB and direction flags
21 * - Low bandwidth TDX hypercalls (x86_64 only) are similar to LB
27 * - High bandwidth (HB) hypercalls are I/O port based only. They have
32 * arg0 - VMWARE_HYPERVISOR_MAGIC
33 * arg1 - Hypercall command
34 * arg3 bits [15:0] - Port number, HB and direction flags
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dcirrus,madera.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
30 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
33 pin-settings:
40 '-pins$':
43 - $ref: pincfg-node.yaml#
44 - $ref: pinmux-node.yaml#
63 dmic6, io, dsp-gpio, irq1, irq2, fll1-clk,
[all …]
/linux-6.12.1/Documentation/iio/
Dad4695.rst1 .. SPDX-License-Identifier: GPL-2.0-only
26 ----------------
30 4-wire mode
35 .. code-block::
37 +-------------+ +-------------+
38 | CS |<-+------| CS |
39 | CNV |<-+ | |
42 | SDI |<--------| SDO |
43 | SDO |-------->| SDI |
44 | SCLK |<--------| SCLK |
[all …]

1234567