Home
last modified time | relevance | path

Searched full:i2s (Results 1 – 25 of 1189) sorted by relevance

12345678910>>...48

/linux-6.12.1/sound/soc/rockchip/
Drockchip_i2s.c4 * ALSA SoC Audio Layer - Rockchip I2S Controller driver
24 #define DRV_NAME "rockchip-i2s"
48 * I2S controller hopes to start the tx and rx together,
62 static int i2s_pinctrl_select_bclk_on(struct rk_i2s_dev *i2s) in i2s_pinctrl_select_bclk_on() argument
66 if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_on)) in i2s_pinctrl_select_bclk_on()
67 ret = pinctrl_select_state(i2s->pinctrl, i2s->bclk_on); in i2s_pinctrl_select_bclk_on()
70 dev_err(i2s->dev, "bclk enable failed %d\n", ret); in i2s_pinctrl_select_bclk_on()
75 static int i2s_pinctrl_select_bclk_off(struct rk_i2s_dev *i2s) in i2s_pinctrl_select_bclk_off() argument
80 if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_off)) in i2s_pinctrl_select_bclk_off()
81 ret = pinctrl_select_state(i2s->pinctrl, i2s->bclk_off); in i2s_pinctrl_select_bclk_off()
[all …]
/linux-6.12.1/sound/soc/img/
Dimg-i2s-out.c3 * IMG I2S output controller driver
69 struct img_i2s_out *i2s = dev_get_drvdata(dev); in img_i2s_out_runtime_suspend() local
71 clk_disable_unprepare(i2s->clk_ref); in img_i2s_out_runtime_suspend()
72 clk_disable_unprepare(i2s->clk_sys); in img_i2s_out_runtime_suspend()
79 struct img_i2s_out *i2s = dev_get_drvdata(dev); in img_i2s_out_runtime_resume() local
82 ret = clk_prepare_enable(i2s->clk_sys); in img_i2s_out_runtime_resume()
88 ret = clk_prepare_enable(i2s->clk_ref); in img_i2s_out_runtime_resume()
91 clk_disable_unprepare(i2s->clk_sys); in img_i2s_out_runtime_resume()
98 static inline void img_i2s_out_writel(struct img_i2s_out *i2s, u32 val, in img_i2s_out_writel() argument
101 writel(val, i2s->base + reg); in img_i2s_out_writel()
[all …]
Dimg-i2s-in.c3 * IMG I2S input controller driver
67 struct img_i2s_in *i2s = dev_get_drvdata(dev); in img_i2s_in_runtime_suspend() local
69 clk_disable_unprepare(i2s->clk_sys); in img_i2s_in_runtime_suspend()
76 struct img_i2s_in *i2s = dev_get_drvdata(dev); in img_i2s_in_runtime_resume() local
79 ret = clk_prepare_enable(i2s->clk_sys); in img_i2s_in_runtime_resume()
88 static inline void img_i2s_in_writel(struct img_i2s_in *i2s, u32 val, u32 reg) in img_i2s_in_writel() argument
90 writel(val, i2s->base + reg); in img_i2s_in_writel()
93 static inline u32 img_i2s_in_readl(struct img_i2s_in *i2s, u32 reg) in img_i2s_in_readl() argument
95 return readl(i2s->base + reg); in img_i2s_in_readl()
98 static inline void img_i2s_in_ch_writel(struct img_i2s_in *i2s, u32 chan, in img_i2s_in_ch_writel() argument
[all …]
/linux-6.12.1/sound/soc/hisilicon/
Dhi6210-i2s.c3 * linux/sound/soc/m8m/hi6210_i2s.c - I2S IP driver
31 #include "hi6210-i2s.h"
80 static inline void hi6210_write_reg(struct hi6210_i2s *i2s, int reg, u32 val) in hi6210_write_reg() argument
82 writel(val, i2s->base + reg); in hi6210_write_reg()
85 static inline u32 hi6210_read_reg(struct hi6210_i2s *i2s, int reg) in hi6210_read_reg() argument
87 return readl(i2s->base + reg); in hi6210_read_reg()
93 struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in hi6210_i2s_startup() local
98 regmap_read(i2s->sysctrl, SC_PERIPH_RSTSTAT2, &val); in hi6210_i2s_startup()
100 regmap_write(i2s->sysctrl, SC_PERIPH_RSTDIS2, BIT(4)); in hi6210_i2s_startup()
102 for (n = 0; n < i2s->clocks; n++) { in hi6210_i2s_startup()
[all …]
/linux-6.12.1/sound/soc/stm/
Dstm32_i2s.c3 * STM32 ALSA SoC Digital Audio Interface (I2S) driver.
143 /* Registers below apply to I2S version 1.1 and more */
205 * struct stm32_i2s_data - private data of I2S
206 * @regmap_conf: I2S register map configuration pointer
207 * @regmap: I2S register map pointer
213 * @i2sclk: kernel clock feeding the I2S clock generator
214 * @i2smclk: master clock from I2S mclk provider
216 * @x8kclk: I2S parent clock for sampling frequencies multiple of 8kHz
217 * @x11kclk: I2S parent clock for sampling frequencies multiple of 11kHz
219 * @phys_addr: I2S registers physical base address
[all …]
/linux-6.12.1/sound/soc/tegra/
Dtegra210_i2s.c3 // tegra210_i2s.c - Tegra210 I2S driver
33 * is required to select i2s4b for it to be functional for I2S
52 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_set_clock_rate() local
56 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
58 /* No need to set rates if I2S is being operated in slave */ in tegra210_i2s_set_clock_rate()
62 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
64 dev_err(dev, "can't set I2S bit clock rate %u, err: %d\n", in tegra210_i2s_set_clock_rate()
69 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
71 * Other I/O modules in AHUB can use i2s bclk as reference in tegra210_i2s_set_clock_rate()
75 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
[all …]
Dtegra30_i2s.c3 * tegra30_i2s.c - Tegra30 I2S driver
36 #define DRV_NAME "tegra30-i2s"
40 struct tegra30_i2s *i2s = dev_get_drvdata(dev); in tegra30_i2s_runtime_suspend() local
42 regcache_cache_only(i2s->regmap, true); in tegra30_i2s_runtime_suspend()
44 clk_disable_unprepare(i2s->clk_i2s); in tegra30_i2s_runtime_suspend()
51 struct tegra30_i2s *i2s = dev_get_drvdata(dev); in tegra30_i2s_runtime_resume() local
54 ret = clk_prepare_enable(i2s->clk_i2s); in tegra30_i2s_runtime_resume()
60 regcache_cache_only(i2s->regmap, false); in tegra30_i2s_runtime_resume()
61 regcache_mark_dirty(i2s->regmap); in tegra30_i2s_runtime_resume()
63 ret = regcache_sync(i2s->regmap); in tegra30_i2s_runtime_resume()
[all …]
Dtegra20_i2s.c3 * tegra20_i2s.c - Tegra20 I2S driver
35 #define DRV_NAME "tegra20-i2s"
39 struct tegra20_i2s *i2s = dev_get_drvdata(dev); in tegra20_i2s_runtime_suspend() local
41 regcache_cache_only(i2s->regmap, true); in tegra20_i2s_runtime_suspend()
43 clk_disable_unprepare(i2s->clk_i2s); in tegra20_i2s_runtime_suspend()
50 struct tegra20_i2s *i2s = dev_get_drvdata(dev); in tegra20_i2s_runtime_resume() local
53 ret = reset_control_assert(i2s->reset); in tegra20_i2s_runtime_resume()
57 ret = clk_prepare_enable(i2s->clk_i2s); in tegra20_i2s_runtime_resume()
65 ret = reset_control_deassert(i2s->reset); in tegra20_i2s_runtime_resume()
69 regcache_cache_only(i2s->regmap, false); in tegra20_i2s_runtime_resume()
[all …]
/linux-6.12.1/sound/soc/jz4740/
Djz4740-i2s.c97 struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai); in jz4740_i2s_startup() local
105 if (!i2s->soc_info->shared_fifo_flush) { in jz4740_i2s_startup()
107 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH); in jz4740_i2s_startup()
109 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_RFLUSH); in jz4740_i2s_startup()
121 if (i2s->soc_info->shared_fifo_flush) in jz4740_i2s_startup()
122 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH); in jz4740_i2s_startup()
124 ret = clk_prepare_enable(i2s->clk_i2s); in jz4740_i2s_startup()
128 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE); in jz4740_i2s_startup()
135 struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai); in jz4740_i2s_shutdown() local
140 regmap_clear_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE); in jz4740_i2s_shutdown()
[all …]
/linux-6.12.1/sound/soc/adi/
Daxi-i2s.c60 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_trigger() local
83 regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val); in axi_i2s_trigger()
91 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_hw_params() local
98 bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1; in axi_i2s_hw_params()
100 regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) | in axi_i2s_hw_params()
109 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_startup() local
118 regmap_write(i2s->regmap, AXI_I2S_REG_RESET, mask); in axi_i2s_startup()
122 &i2s->rate_constraints); in axi_i2s_startup()
126 return clk_prepare_enable(i2s->clk_ref); in axi_i2s_startup()
132 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_shutdown() local
[all …]
/linux-6.12.1/sound/soc/xtensa/
Dxtfpga-i2s.c3 * Xtfpga I2S controller driver
17 #define DRV_NAME "xtfpga-i2s"
46 * I2S controller operation:
76 unsigned (*tx_fn)(struct xtfpga_i2s *i2s,
126 * If I2S interface is configured with smaller sample resolution, only
131 struct xtfpga_i2s *i2s, struct snd_pcm_runtime *runtime, \
137 for (; i2s->tx_fifo_level < i2s->tx_fifo_high; \
138 i2s->tx_fifo_level += 2) { \
140 i2s->regs + XTFPGA_I2S_CHAN0_DATA); \
142 i2s->regs + XTFPGA_I2S_CHAN0_DATA); \
[all …]
/linux-6.12.1/sound/soc/sunxi/
Dsun4i-i2s.c183 /* Register fields for i2s */
196 unsigned long (*get_bclk_parent_rate)(const struct sun4i_i2s *i2s);
205 int (*set_chan_cfg)(const struct sun4i_i2s *i2s,
208 int (*set_fmt)(const struct sun4i_i2s *i2s, unsigned int fmt);
225 /* Register fields for i2s */
278 static unsigned long sun4i_i2s_get_bclk_parent_rate(const struct sun4i_i2s *i2s) in sun4i_i2s_get_bclk_parent_rate() argument
280 return i2s->mclk_freq; in sun4i_i2s_get_bclk_parent_rate()
283 static unsigned long sun8i_i2s_get_bclk_parent_rate(const struct sun4i_i2s *i2s) in sun8i_i2s_get_bclk_parent_rate() argument
285 return clk_get_rate(i2s->mod_clk); in sun8i_i2s_get_bclk_parent_rate()
288 static int sun4i_i2s_get_bclk_div(struct sun4i_i2s *i2s, in sun4i_i2s_get_bclk_div() argument
[all …]
/linux-6.12.1/sound/soc/google/
Dchv3-i2s.c9 * The I2S interface consists of two ring buffers - one for RX and one for
70 .name = "chv3-i2s",
101 static inline void chv3_i2s_wr(struct chv3_i2s_dev *i2s, int offset, u32 val) in chv3_i2s_wr() argument
103 writel(val, i2s->iobase + offset); in chv3_i2s_wr()
106 static inline u32 chv3_i2s_rd(struct chv3_i2s_dev *i2s, int offset) in chv3_i2s_rd() argument
108 return readl(i2s->iobase + offset); in chv3_i2s_rd()
113 struct chv3_i2s_dev *i2s = data; in chv3_i2s_isr() local
116 reg = readl(i2s->iobase_irq + I2S_IRQ_CLR); in chv3_i2s_isr()
121 snd_pcm_period_elapsed(i2s->rx_substream); in chv3_i2s_isr()
124 snd_pcm_period_elapsed(i2s->tx_substream); in chv3_i2s_isr()
[all …]
/linux-6.12.1/sound/soc/loongson/
Dloongson_i2s.c3 // Common functions for loongson I2S controller driver
33 struct loongson_i2s *i2s = snd_soc_dai_get_drvdata(dai); in loongson_i2s_trigger() local
43 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, mask, mask); in loongson_i2s_trigger()
50 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, mask, 0); in loongson_i2s_trigger()
63 struct loongson_i2s *i2s = snd_soc_dai_get_drvdata(dai); in loongson_i2s_hw_params() local
64 u32 clk_rate = i2s->clk_rate; in loongson_i2s_hw_params()
65 u32 sysclk = i2s->sysclk; in loongson_i2s_hw_params()
73 switch (i2s->rev_id) { in loongson_i2s_hw_params()
84 regmap_write(i2s->regmap, LS_I2S_CFG, val); in loongson_i2s_hw_params()
94 regmap_read(i2s->regmap, LS_I2S_CFG, &val); in loongson_i2s_hw_params()
[all …]
Dloongson_i2s_pci.c3 // loongson_i2s_pci.c -- Loongson I2S controller driver
79 struct loongson_i2s *i2s; in loongson_i2s_pci_probe() local
87 i2s = devm_kzalloc(dev, sizeof(*i2s), GFP_KERNEL); in loongson_i2s_pci_probe()
88 if (!i2s) in loongson_i2s_pci_probe()
91 i2s->rev_id = pdev->revision; in loongson_i2s_pci_probe()
92 i2s->dev = dev; in loongson_i2s_pci_probe()
93 pci_set_drvdata(pdev, i2s); in loongson_i2s_pci_probe()
101 i2s->reg_base = pcim_iomap_table(pdev)[0]; in loongson_i2s_pci_probe()
102 i2s->regmap = devm_regmap_init_mmio(dev, i2s->reg_base, in loongson_i2s_pci_probe()
104 if (IS_ERR(i2s->regmap)) in loongson_i2s_pci_probe()
[all …]
/linux-6.12.1/sound/soc/samsung/
Di2s.c3 // ALSA SoC Audio Layer - Samsung I2S Controller driver
8 #include <dt-bindings/sound/samsung-i2s.h>
25 #include "i2s.h"
26 #include "i2s-regs.h"
101 /* The I2S controller's core clock */
104 /* Clock for generating I2S signals */
110 /* Cache of selected I2S registers for system suspend */
132 /* A flag indicating the I2S slave mode operation */
137 static inline bool is_secondary(struct i2s_dai *i2s) in is_secondary() argument
139 return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY; in is_secondary()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dallwinner,sun4i-a10-i2s.yaml4 $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-i2s.yaml#
7 title: Allwinner A10 I2S Controller
19 - const: allwinner,sun4i-a10-i2s
20 - const: allwinner,sun6i-a31-i2s
21 - const: allwinner,sun8i-a83t-i2s
22 - const: allwinner,sun8i-h3-i2s
24 - const: allwinner,sun8i-r40-i2s
25 - const: allwinner,sun8i-h3-i2s
27 - const: allwinner,sun8i-v3-i2s
28 - const: allwinner,sun8i-h3-i2s
[all …]
Drockchip-i2s.yaml4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
7 title: Rockchip I2S controller
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
22 - const: rockchip,rk3066-i2s
25 - rockchip,px30-i2s
26 - rockchip,rk1808-i2s
27 - rockchip,rk3036-i2s
28 - rockchip,rk3128-i2s
29 - rockchip,rk3188-i2s
30 - rockchip,rk3228-i2s
[all …]
Dsamsung-i2s.yaml4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
7 title: Samsung SoC I2S controller
19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
25 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
32 samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
33 Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO
41 tesla,fsd-i2s: for 8/16/24bit stereo channel I2S for playback and
44 frequencies supported by Exynos7 I2S and 7.1 channel TDM support
49 - samsung,s3c6410-i2s
[all …]
Dnvidia,tegra210-i2s.yaml4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#
7 title: Tegra210 I2S Controller
10 The Inter-IC Sound (I2S) controller implements full-duplex,
12 interfaces. It can interface with I2S compatible devices.
13 I2S controller can operate both in master and slave mode.
24 pattern: "^i2s@[0-9a-f]*$"
28 - const: nvidia,tegra210-i2s
31 - nvidia,tegra234-i2s
32 - nvidia,tegra194-i2s
33 - nvidia,tegra186-i2s
[all …]
Drockchip,i2s-tdm.yaml4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
7 title: Rockchip I2S/TDM Controller
10 The Rockchip I2S/TDM Controller is a Time Division Multiplexed
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
25 - rockchip,rk3308-i2s-tdm
26 - rockchip,rk3568-i2s-tdm
27 - rockchip,rk3588-i2s-tdm
28 - rockchip,rv1126-i2s-tdm
112 rockchip,i2s-rx-route:
[all …]
Dingenic,aic.yaml7 title: Ingenic SoCs AC97 / I2S Controller (AIC)
22 - ingenic,jz4740-i2s
23 - ingenic,jz4760-i2s
24 - ingenic,jz4770-i2s
25 - ingenic,jz4780-i2s
26 - ingenic,x1000-i2s
28 - const: ingenic,jz4725b-i2s
29 - const: ingenic,jz4740-i2s
43 - description: I2S clock
48 - const: i2s
[all …]
Dimg,i2s-in.txt1 Imagination Technologies I2S Input Controller
5 - compatible : Compatible list, must contain "img,i2s-in"
19 "rx" Single DMA channel used by all active I2S channels
21 - img,i2s-channels : Number of I2S channels instantiated in the I2S in block
25 - interrupts : Contains the I2S in interrupts. Depending on
27 or an interrupt per I2S channel. For the case where there is
31 - resets: Contains a phandle to the I2S in reset signal
37 i2s_in: i2s-in@18100800 {
38 compatible = "img,i2s-in";
45 img,i2s-channels = <6>;
/linux-6.12.1/sound/soc/intel/avs/boards/
DKconfig8 tristate "da7219 I2S board"
13 This adds support for AVS with DA7219 I2S codec configuration.
26 tristate "es8336 I2S board"
31 This adds support for AVS with ES8336 I2S codec configuration.
44 tristate "I2S test board"
46 This adds support for I2S test-board which can be used to verify
47 transfer over I2S interface with SSP loopback scenarios.
50 tristate "max98927 I2S board"
55 This adds support for AVS with MAX98927 I2S codec configuration.
60 tristate "max98357A I2S board"
[all …]
/linux-6.12.1/sound/soc/qcom/qdsp6/
Dq6prm.h6 /* Clock ID for Primary I2S IBIT */
8 /* Clock ID for Primary I2S EBIT */
10 /* Clock ID for Secondary I2S IBIT */
12 /* Clock ID for Secondary I2S EBIT */
14 /* Clock ID for Tertiary I2S IBIT */
16 /* Clock ID for Tertiary I2S EBIT */
18 /* Clock ID for Quartnery I2S IBIT */
20 /* Clock ID for Quartnery I2S EBIT */
22 /* Clock ID for Speaker I2S IBIT */
24 /* Clock ID for Speaker I2S EBIT */
[all …]

12345678910>>...48