| /linux-6.12.1/Documentation/userspace-api/media/v4l/ |
| D | pixfmt-z16.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-Z16:
10 16-bit depth data with distance values at each pixel
16 This is a 16-bit format, representing depth data. Each pixel is a
19 is stored in a 16-bit word in the little endian byte order.
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
31 * - start + 0:
32 - Z\ :sub:`00low`
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| /linux-6.12.1/Documentation/devicetree/bindings/sound/ |
| D | ti,tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
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| D | cirrus,cs35l41.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - david.rhodes@cirrus.com
19 - cirrus,cs35l40
20 - cirrus,cs35l41
28 '#sound-dai-cells':
33 reset-gpios:
36 VA-supply:
39 VP-supply:
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| D | cirrus,cs35l45.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
11 - Richard Fitzgerald <rf@opensource.cirrus.com>
18 - $ref: dai-common.yaml#
23 - cirrus,cs35l45
31 '#sound-dai-cells':
34 reset-gpios:
37 vdd-a-supply:
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| /linux-6.12.1/Documentation/hwmon/ |
| D | pmbus.rst | 12 Addresses scanned: -
23 Addresses scanned: -
27 https://www.onsemi.com/pub_link/Collateral/ADP4000-D.PDF
29 https://www.onsemi.com/pub_link/Collateral/NCP4200-D.PDF
31 https://www.onsemi.com/pub_link/Collateral/JUNE%202009-%20REV.%200.PDF
37 Addresses scanned: -
55 Addresses scanned: -
73 Addresses scanned: -
83 Addresses scanned: -
88 Author: Guenter Roeck <linux@roeck-us.net>
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| /linux-6.12.1/Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad4695.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of similar multi-channel analog to digital converters with SPI bus.
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad4695
27 - adi,ad4696
28 - adi,ad4697
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| D | adi,ad4000.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marcelo Schmitt <marcelo.schmitt@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4000-4004-4008.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4001-4005.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4002-4006-4010.pdf
18 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4003-4007-4011.pdf
19 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4020-4021-4022.pdf
20 https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4001.pdf
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| /linux-6.12.1/arch/arm/nwfpe/ |
| D | softfloat-specialize | 5 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
11 National Science Foundation under grant MIP-9311980. The original version
12 of this code was written as part of a project to build a fixed-point vector
16 http://www.jhauser.us/arithmetic/SoftFloat-2b/SoftFloat-source.txt
33 -------------------------------------------------------------------------------
34 Underflow tininess-detection mode, statically initialized to default value.
36 -------------------------------------------------------------------------------
41 -------------------------------------------------------------------------------
42 Raises the exceptions specified by `flags'. Floating-point traps can be
48 Moved this function out of softfloat-specialize into fpmodule.c.
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| D | softfloat.c | 4 This C source file is part of the SoftFloat IEC/IEEE Floating-point
10 National Science Foundation under grant MIP-9311980. The original version
11 of this code was written as part of a project to build a fixed-point vector
15 http://www.jhauser.us/arithmetic/SoftFloat-2b/SoftFloat-source.txt
38 -------------------------------------------------------------------------------
39 Primitive arithmetic functions, including multi-word arithmetic, and
42 -------------------------------------------------------------------------------
44 #include "softfloat-macros"
47 -------------------------------------------------------------------------------
52 are propagated from function inputs to output. These details are target-
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| /linux-6.12.1/lib/raid6/ |
| D | s390vx.uc | 1 // SPDX-License-Identifier: GPL-2.0
5 * $#-way unrolled RAID6 gen/xor functions for s390
34 * operation returns 0xFF if the high bit of the byte is 1,
35 * or 0x00 if the high bit is 0. The result is stored in vector
40 #define AND(x, y, z) fpu_vn(x, y, z)
41 #define XOR(x, y, z) fpu_vx(x, y, z)
42 #define LOAD_DATA(x, ptr) fpu_vlm(x, x + $# - 1, ptr)
43 #define STORE_DATA(x, ptr) fpu_vstm(x, x + $# - 1, ptr)
50 int d, z, z0;
56 z0 = disks - 3; /* Highest data disk */
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| D | int.uc | 1 /* -*- linux-c -*- ------------------------------------------------------- *
3 * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
8 * Boston MA 02111-1307, USA; either version 2 of the License, or
11 * ----------------------------------------------------------------------- */
16 * $#-way unrolled portable integer math RAID-6 instruction set
45 * These sub-operations are separate inlines since they can sometimes be
46 * specially optimized using architecture-specific hacks.
62 * The MASK() operation returns 0xFF in any byte for which the high
63 * bit is 1, 0x00 for any byte for which the high bit is 0.
70 vv = (vv << 1) - (vv >> 7); /* Overflow on the top bit is OK */
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| D | neon.uc | 1 /* -----------------------------------------------------------------------
3 * neon.uc - RAID-6 syndrome calculation using ARM NEON instructions
9 * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
14 * Boston MA 02111-1307, USA; either version 2 of the License, or
17 * ----------------------------------------------------------------------- */
22 * $#-way unrolled NEON intrinsics math RAID-6 instruction set
44 * The MASK() operation returns 0xFF in any byte for which the high
45 * bit is 1, 0x00 for any byte for which the high bit is 0.
61 int d, z, z0;
66 z0 = disks - 3; /* Highest data disk */
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| D | altivec.uc | 1 /* -*- linux-c -*- ------------------------------------------------------- *
3 * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
8 * Boston MA 02111-1307, USA; either version 2 of the License, or
11 * ----------------------------------------------------------------------- */
16 * $#-way unrolled portable integer math RAID-6 instruction set
56 * The MASK() operation returns 0xFF in any byte for which the high
57 * bit is 1, 0x00 for any byte for which the high bit is 0.
75 int d, z, z0;
80 z0 = disks - 3; /* Highest data disk */
86 for ( z = z0-1 ; z >= 0 ; z-- ) {
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| /linux-6.12.1/lib/math/ |
| D | div64.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Based on former do_div() implementation from asm-parisc/div64.h:
6 * Copyright (C) 1999 Hewlett-Packard Co
7 * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
16 * for some CPUs. __div64_32() can be overridden by linking arch-specific
37 uint32_t high = rem >> 32; in __div64_32() local
41 if (high >= base) { in __div64_32()
42 high /= base; in __div64_32()
43 res = (uint64_t) high << 32; in __div64_32()
44 rem -= (uint64_t) (high*base) << 32; in __div64_32()
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| /linux-6.12.1/drivers/gpio/ |
| D | gpio-fxl6408.c | 1 // SPDX-License-Identifier: GPL-2.0-only
26 * the output high instead of low.
30 /* Bits here make the output High-Z, instead of the OUTPUT value. */
33 /* Returns the current status (1 = HIGH) of the input pins. */
38 * This bit is HIGH if input GPIO != default state (register 09h).
99 return dev_err_probe(dev, -ENODEV, "invalid device id 0x%02x\n", val); in fxl6408_identify()
106 struct device *dev = &client->dev; in fxl6408_probe()
126 /* Disable High-Z of outputs, so that our OUTPUT updates actually take effect. */ in fxl6408_probe()
129 return dev_err_probe(dev, ret, "failed to write 'output high Z' register\n"); in fxl6408_probe()
|
| /linux-6.12.1/arch/s390/tools/ |
| D | gen_facilities.c | 1 // SPDX-License-Identifier: GPL-2.0
26 * -march=<machine>.
31 1, /* z/Arch mode installed */
33 21, /* extended-immediate facility */
41 45, /* fast-BCR, etc. */
44 49, /* misc-instruction-extensions */
48 53, /* load-and-zero-rightmost-byte, etc. */
52 58, /* miscellaneous-instruction-extension 2 */
55 61, /* miscellaneous-instruction-extension 3 */
57 -1 /* END */
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| /linux-6.12.1/mm/ |
| D | page_alloc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
39 #include <linux/fault-inject.h>
63 /* Free Page Internal flags: for internal, non-pcp variants of free_pages(). */
72 * reporting it and marking it "reported" - it only skips notifying
81 * page shuffling (relevant code - e.g., memory onlining - is expected to
84 * Note: No code should rely on this flag for correctness - it's purely
91 /* prevent >1 _updater_ of zone percpu pageset ->high and ->batch fields */
104 /* UP spin_trylock always succeeds so disable IRQs to prevent re-entrancy. */
115 * interfered with and a high priority task cannot preempt the allocator.
126 * Generic helper to lookup and a per-cpu variable with an embedded spinlock.
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| /linux-6.12.1/arch/arm/boot/dts/aspeed/ |
| D | aspeed-bmc-lenovo-hr630.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
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| /linux-6.12.1/Documentation/arch/arm/nwfpe/ |
| D | todo.rst | 6 POW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - power
7 RPW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse power
8 POL{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - polar angle (arctan2)
10 LOG{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base 10
11 LGN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base e
12 EXP{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - exponent
13 SIN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - sine
14 COS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - cosine
15 TAN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - tangent
16 ASN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arcsine
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| /linux-6.12.1/arch/arm/kernel/ |
| D | phys2virt.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 1994-2002 Russell King
22 * __fixup_pv_table - patch the stub instructions with the delta between
36 subs r3, r8, #PAGE_OFFSET @ PHYS_OFFSET - PAGE_OFFSET
38 strcc ip, [r0, #HIGH_OFFSET] @ save to __pv_offset high bits
56 ldr r0, [r6, #HIGH_OFFSET] @ pv_offset high word
61 @ The Thumb-2 versions of the patchable sequences are
63 @ phys-to-virt: movw <reg>, #offset<31:21>
67 @ virt-to-phys (non-LPAE): movw <reg>, #offset<31:21>
71 @ virt-to-phys (LPAE): movw <reg>, #offset<31:21>
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| /linux-6.12.1/include/linux/ |
| D | lis3lv02d.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * struct lis3lv02d_platform_data - lis3 chip family platform data
10 * @click_thresh_z: Click detection unit z axis threshold
24 * @hipass_ctrl: High pass filter control (enable / disable, cut off
26 * @axis_x: Sensor orientation remapping for x-axis
27 * @axis_y: Sensor orientation remapping for y-axis
28 * @axis_z: Sensor orientation remapping for z-axis
44 * on the configuration. For example, interrupt detection block can use high
111 #define LIS3_INV_DEV_X -1
112 #define LIS3_INV_DEV_Y -2
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| D | mmzone.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/pageblock-flags.h>
20 #include <linux/page-flags-layout.h>
23 #include <linux/page-flags.h>
28 /* Free memory management - zoned buddy allocator. */
80 get_pfnblock_flags_mask(&folio->page, pfn, MIGRATETYPE_MASK))
109 #define MIGRATETYPE_MASK ((1UL << PB_migratetype_bits) - 1)
115 get_pfnblock_flags_mask(&folio->page, folio_pfn(folio), \
200 NR_KERNEL_MISC_RECLAIMABLE, /* reclaimable non-slab kernel pages */
251 * Global and per-node slab counters track slab pages. in vmstat_item_in_bytes()
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| /linux-6.12.1/include/linux/platform_data/ |
| D | gpmc-omap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
34 /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
59 u32 access; /* Start-cycle to first data valid delay */
96 u32 t_cez_r; /* read CS deassertion to high Z */
97 u32 t_cez_w; /* write CS deassertion to high Z */
98 u32 t_oez; /* OE deassertion to high Z */
134 #define GPMC_DEVWIDTH_8BIT 1 /* 8-bit device width */
135 #define GPMC_DEVWIDTH_16BIT 2 /* 16-bit device width */
136 #define GPMC_MUX_AAD 1 /* Addr-Addr-Data multiplex */
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| /linux-6.12.1/drivers/md/dm-vdo/indexer/ |
| D | volume-index.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 #include "volume-index.h"
15 #include "memory-alloc.h"
18 #include "thread-utils.h"
22 #include "hash-utils.h"
28 * dense chapters). If there are no sparse chapters, only the non-hook sub index is used, and it
42 * or after all requests have been flushed in order to shut down. The only multi-threaded operation
50 * high-order bits. When the index needs to deal with ordering of index chapter numbers, as when
87 /* The non-hook subindex configuration */
99 static const char MAGIC_START_5[] = "MI5-0005";
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| /linux-6.12.1/arch/x86/include/asm/ |
| D | percpu.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
66 * arch_raw_cpu_ptr should not be used in 32-bit VDSO for a 64-bit
101 * Initialized pointers to per-CPU variables needed for the boot
117 * For arch-specific code, we can use direct single-insn ops (they
193 * The generic per-CPU infrastrucutre is not suitable for
194 * reading const-qualified variables.
232 * Generate a per-CPU add to memory instruction and optimize code
238 ((val) == 1 || (val) == -1)) ? \
248 else if (pao_ID__ == -1) \
270 * raw_cpu_xchg() can use a load-store since
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