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/linux-6.12.1/Documentation/devicetree/bindings/soc/rockchip/
Dgrf.yaml4 $id: http://devicetree.org/schemas/soc/rockchip/grf.yaml#
7 title: Rockchip General Register Files (GRF)
18 - rockchip,rk3566-pipe-grf
19 - rockchip,rk3568-pcie3-phy-grf
20 - rockchip,rk3568-pipe-grf
21 - rockchip,rk3568-pipe-phy-grf
22 - rockchip,rk3568-usb2phy-grf
23 - rockchip,rk3576-bigcore-grf
24 - rockchip,rk3576-cci-grf
25 - rockchip,rk3576-gpu-grf
[all …]
/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-rk.c80 struct regmap *grf; member
106 if (IS_ERR(bsp_priv->grf)) { in px30_set_to_rmii()
107 dev_err(dev, "%s: Missing rockchip,grf property\n", __func__); in px30_set_to_rmii()
111 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_to_rmii()
127 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_rmii_speed()
135 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, in px30_set_rmii_speed()
186 if (IS_ERR(bsp_priv->grf)) { in rk3128_set_to_rgmii()
187 dev_err(dev, "Missing rockchip,grf property\n"); in rk3128_set_to_rgmii()
191 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1, in rk3128_set_to_rgmii()
194 regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON0, in rk3128_set_to_rgmii()
[all …]
/linux-6.12.1/drivers/soc/rockchip/
Dgrf.c162 .compatible = "rockchip,rk3036-grf",
165 .compatible = "rockchip,rk3128-grf",
168 .compatible = "rockchip,rk3228-grf",
171 .compatible = "rockchip,rk3288-grf",
174 .compatible = "rockchip,rk3328-grf",
177 .compatible = "rockchip,rk3368-grf",
180 .compatible = "rockchip,rk3399-grf",
183 .compatible = "rockchip,rk3566-pipe-grf",
186 .compatible = "rockchip,rk3576-sys-grf",
189 .compatible = "rockchip,rk3576-ioc-grf",
[all …]
Dio-domain.c80 struct regmap *grf; member
102 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val0); in rk3568_iodomain_write()
103 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val1); in rk3568_iodomain_write()
117 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL0, val0); in rk3568_iodomain_write()
118 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL1, val1); in rk3568_iodomain_write()
141 ret = regmap_write(iod->grf, iod->soc_data->grf_offset, val); in rockchip_iodomain_write()
143 dev_err(iod->dev, "Couldn't write to GRF\n"); in rockchip_iodomain_write()
212 ret = regmap_write(iod->grf, PX30_IO_VSEL, val); in px30_iodomain_init()
231 ret = regmap_write(iod->grf, RK3288_SOC_CON2, val); in rk3288_iodomain_init()
250 ret = regmap_write(iod->grf, RK3308_SOC_CON0, val); in rk3308_iodomain_init()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop2.yaml55 - description: Peripheral(vop grf/dsi) clock.
68 rockchip,grf:
71 Phandle to GRF regs used for control the polarity of dclk/hsync/vsync of DPI,
74 rockchip,vo1-grf:
77 Phandle to VO GRF regs used for control the polarity of dclk/hsync/vsync of hdmi
80 rockchip,vop-grf:
83 Phandle to VOP GRF regs used for control data path between vopr and hdmi/edp.
88 Phandle to PMU GRF used for query vop memory bisr status on rk3588.
139 - rockchip,grf
140 - rockchip,vo1-grf
[all …]
Dcdn-dp-rockchip.txt12 Required elements: "core-clk" "pclk" "spdif" "grf"
22 - rockchip,grf: this soc should set GRF regs, so need get grf here.
43 clock-names = "core-clk", "pclk", "spdif", "grf";
51 rockchip,grf = <&grf>;
Drockchip,dw-hdmi.yaml51 - description: Power for GRF IO
62 - grf
66 - grf
115 rockchip,grf:
118 phandle to the GRF to mux vopl/vopb.
131 - rockchip,grf
151 rockchip,grf = <&grf>;
Drockchip,analogix-dp.yaml28 - const: grf
39 rockchip,grf:
42 This SoC makes use of GRF regs.
50 - rockchip,grf
72 rockchip,grf = <&grf>;
Drockchip,dw-mipi-dsi.yaml39 - const: grf
42 rockchip,grf:
45 This SoC uses GRF regs to switch between vopl/vopb.
71 - rockchip,grf
141 rockchip,grf = <&grf>;
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dphy-rockchip-naneng-combphy.yaml64 rockchip,pipe-grf:
67 Some additional phy settings are accessed through GRF regs.
69 rockchip,pipe-phy-grf:
72 Some additional pipe settings are accessed through GRF regs.
83 - rockchip,pipe-grf
84 - rockchip,pipe-phy-grf
120 compatible = "rockchip,rk3568-pipe-grf", "syscon";
125 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
139 rockchip,pipe-grf = <&pipegrf>;
140 rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
Dphy-rockchip-usbdp.yaml66 rockchip,u2phy-grf:
71 rockchip,usb-grf:
76 rockchip,usbdpphy-grf:
81 rockchip,vo-grf:
144 rockchip,u2phy-grf = <&usb2phy0_grf>;
145 rockchip,usb-grf = <&usb_grf>;
146 rockchip,usbdpphy-grf = <&usbdpphy0_grf>;
147 rockchip,vo-grf = <&vo0_grf>;
Drockchip-inno-csi-dphy.yaml49 rockchip,grf:
52 Some additional phy settings are access through GRF regs.
63 - rockchip,grf
79 rockchip,grf = <&grf>;
Drockchip-mipi-dphy-rx0.yaml31 - const: grf
54 * should be a child of the GRF.
56 * grf: syscon@ff770000 {
57 * compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
70 clock-names = "dphy-ref", "dphy-cfg", "grf";
/linux-6.12.1/drivers/phy/rockchip/
Dphy-rockchip-usb.c55 int (*init_usb_uart)(struct regmap *grf,
323 static int __init rockchip_init_usb_uart_common(struct regmap *grf, in rockchip_init_usb_uart_common() argument
341 ret = regmap_write(grf, regoffs + UOC_CON0, val); in rockchip_init_usb_uart_common()
347 ret = regmap_write(grf, regoffs + UOC_CON2, val); in rockchip_init_usb_uart_common()
358 ret = regmap_write(grf, UOC_CON3, val); in rockchip_init_usb_uart_common()
373 static int __init rk3188_init_usb_uart(struct regmap *grf, in rk3188_init_usb_uart() argument
379 ret = rockchip_init_usb_uart_common(grf, pdata); in rk3188_init_usb_uart()
387 ret = regmap_write(grf, RK3188_UOC0_CON0, val); in rk3188_init_usb_uart()
423 static int __init rk3288_init_usb_uart(struct regmap *grf, in rk3288_init_usb_uart() argument
429 ret = rockchip_init_usb_uart_common(grf, pdata); in rk3288_init_usb_uart()
[all …]
Dphy-rockchip-dp.c28 struct regmap *grf; member
38 ret = regmap_write(dp->grf, GRF_SOC_CON12, in rockchip_set_phy_state()
50 ret = regmap_write(dp->grf, GRF_SOC_CON12, in rockchip_set_phy_state()
107 dp->grf = syscon_node_to_regmap(dev->parent->of_node); in rockchip_dp_phy_probe()
108 if (IS_ERR(dp->grf)) { in rockchip_dp_phy_probe()
110 return PTR_ERR(dp->grf); in rockchip_dp_phy_probe()
113 ret = regmap_write(dp->grf, GRF_SOC_CON12, GRF_EDP_REF_CLK_SEL_INTER | in rockchip_dp_phy_probe()
116 dev_err(dp->dev, "Could not config GRF edp ref clk: %d\n", ret); in rockchip_dp_phy_probe()
/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Drockchip,rk3328-grf-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/rockchip,rk3328-grf-gpio.yaml#
10 The Rockchip RK3328 General Register File (GRF) outputs only the
14 The GPIO node should be declared as the child of the GRF node.
30 const: rockchip,rk3328-grf-gpio
47 compatible = "rockchip,rk3328-grf-gpio";
/linux-6.12.1/drivers/net/ethernet/arc/
Demac_rockchip.c29 struct regmap *grf; member
55 err = regmap_write(emac->grf, emac->soc_data->grf_offset, data); in emac_rockchip_set_mac_speed()
57 pr_err("unable to apply speed %u to grf (%d)\n", speed, err); in emac_rockchip_set_mac_speed()
127 priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, in emac_rockchip_probe()
128 "rockchip,grf"); in emac_rockchip_probe()
129 if (IS_ERR(priv->grf)) { in emac_rockchip_probe()
131 PTR_ERR(priv->grf)); in emac_rockchip_probe()
132 err = PTR_ERR(priv->grf); in emac_rockchip_probe()
187 err = regmap_write(priv->grf, priv->soc_data->grf_offset, data); in emac_rockchip_probe()
189 dev_err(dev, "unable to apply initial settings to grf (%d)\n", in emac_rockchip_probe()
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Drockchip,px30-cru.yaml57 rockchip,grf:
60 Phandle to the syscon managing the "general register files" (GRF),
106 rockchip,grf = <&grf>;
116 rockchip,grf = <&grf>;
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Drockchip,rk3328-codec.yaml32 rockchip,grf:
35 The phandle of the syscon node for the GRF register.
56 - rockchip,grf
70 rockchip,grf = <&grf>;
Dinno-rk3036.txt10 - rockchip,grf : The phandle of grf device node.
17 rockchip,grf = <&grf>;
Drockchip,rk3308-codec.yaml34 rockchip,grf:
37 Phandle to the General Register Files (GRF)
78 - rockchip,grf
92 rockchip,grf = <&grf>;
/linux-6.12.1/Documentation/devicetree/bindings/net/
Drockchip,emac.yaml39 rockchip,grf:
42 Phandle to the syscon GRF used to control speed and mode for the EMAC.
58 - rockchip,grf
100 rockchip,grf = <&grf>;
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk3xxx.dtsi204 rockchip,grf = <&grf>;
273 grf: grf@20008000 { label
310 rockchip,grf = <&grf>;
325 rockchip,grf = <&grf>;
380 rockchip,grf = <&grf>;
395 rockchip,grf = <&grf>;
410 rockchip,grf = <&grf>;
/linux-6.12.1/Documentation/devicetree/bindings/i2c/
Di2c-rk3x.yaml70 rockchip,grf:
74 the general register file (GRF)
76 (bit offset in the GRF) is also required.
123 - rockchip,grf
138 rockchip,grf = <&grf>;
/linux-6.12.1/drivers/gpu/drm/rockchip/
Danalogix_dp-rockchip.c45 * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
46 * @lcdsel_grf_reg: grf register offset of lcdc select
66 struct regmap *grf; member
212 ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val); in rockchip_dp_drm_encoder_enable()
214 DRM_DEV_ERROR(dp->dev, "Could not write to GRF: %d\n", ret); in rockchip_dp_drm_encoder_enable()
278 dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); in rockchip_dp_of_probe()
279 if (IS_ERR(dp->grf)) { in rockchip_dp_of_probe()
280 DRM_DEV_ERROR(dev, "failed to get rockchip,grf property\n"); in rockchip_dp_of_probe()
281 return PTR_ERR(dp->grf); in rockchip_dp_of_probe()
284 dp->grfclk = devm_clk_get(dev, "grf"); in rockchip_dp_of_probe()
[all …]

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