Searched full:gcc_pcie_phy_bcr (Results 1 – 25 of 36) sorted by relevance
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| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | qcom,msm8998-qmp-pcie-phy.yaml | 92 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
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| D | qcom,msm8996-qmp-pcie-phy.yaml | 140 resets = <&gcc GCC_PCIE_PHY_BCR>,
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | qcom,gcc-sdx65.h | 104 #define GCC_PCIE_PHY_BCR 11 macro
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| D | qcom,gcc-sdx55.h | 100 #define GCC_PCIE_PHY_BCR 4 macro
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| D | qcom,sdx75-gcc.h | 181 #define GCC_PCIE_PHY_BCR 14 macro
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| D | qcom,sm7150-gcc.h | 163 #define GCC_PCIE_PHY_BCR 1 macro
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| D | qcom,sm4450-gcc.h | 172 #define GCC_PCIE_PHY_BCR 8 macro
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| D | qcom,sm8550-gcc.h | 197 #define GCC_PCIE_PHY_BCR 13 macro
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| D | qcom,gcc-sm8150.h | 221 #define GCC_PCIE_PHY_BCR 8 macro
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| D | qcom,gcc-sm8450.h | 213 #define GCC_PCIE_PHY_BCR 14 macro
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| D | qcom,gcc-sdm845.h | 208 #define GCC_PCIE_PHY_BCR 3 macro
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| D | qcom,sm8650-gcc.h | 220 #define GCC_PCIE_PHY_BCR 13 macro
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| D | qcom,gcc-sm8250.h | 231 #define GCC_PCIE_PHY_BCR 19 macro
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| D | qcom,gcc-msm8998.h | 284 #define GCC_PCIE_PHY_BCR 78 macro
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| D | qcom,gcc-sc8180x.h | 265 #define GCC_PCIE_PHY_BCR 12 macro
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| D | qcom,gcc-msm8996.h | 325 #define GCC_PCIE_PHY_BCR 85 macro
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| D | qcom,x1e80100-gcc.h | 441 #define GCC_PCIE_PHY_BCR 44 macro
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| /linux-6.12.1/arch/arm/boot/dts/qcom/ |
| D | qcom-sdx55.dtsi | 466 resets = <&gcc GCC_PCIE_PHY_BCR>;
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| D | qcom-sdx65.dtsi | 367 resets = <&gcc GCC_PCIE_PHY_BCR>;
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| /linux-6.12.1/drivers/clk/qcom/ |
| D | gcc-sdx65.c | 1527 [GCC_PCIE_PHY_BCR] = { 0x44000 },
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| D | gcc-sdx55.c | 1567 [GCC_PCIE_PHY_BCR] = { 0x39000 },
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| D | gcc-sdx75.c | 2877 [GCC_PCIE_PHY_BCR] = { 0x54000 },
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| D | gcc-sm4450.c | 2772 [GCC_PCIE_PHY_BCR] = { 0x7f000 },
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| D | gcc-sm8450.c | 3185 [GCC_PCIE_PHY_BCR] = { 0x7f000 },
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| D | gcc-sm7150.c | 2912 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
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