Searched full:gcc_pcie_1_phy_bcr (Results 1 – 25 of 42) sorted by relevance
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/linux-6.12.1/include/dt-bindings/reset/ |
D | qcom,gcc-apq8084.h | 93 #define GCC_PCIE_1_PHY_BCR 84 macro
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/linux-6.12.1/include/dt-bindings/clock/ |
D | qcom,sdx75-gcc.h | 173 #define GCC_PCIE_1_PHY_BCR 6 macro
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D | qcom,gcc-sc7280.h | 212 #define GCC_PCIE_1_PHY_BCR 3 macro
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D | qcom,sm8550-gcc.h | 195 #define GCC_PCIE_1_PHY_BCR 11 macro
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D | qcom,gcc-sm8150.h | 220 #define GCC_PCIE_1_PHY_BCR 7 macro
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D | qcom,gcc-sm8450.h | 211 #define GCC_PCIE_1_PHY_BCR 12 macro
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D | qcom,gcc-sdm845.h | 230 #define GCC_PCIE_1_PHY_BCR 25 macro
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D | qcom,sm8650-gcc.h | 218 #define GCC_PCIE_1_PHY_BCR 11 macro
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D | qcom,gcc-sm8350.h | 226 #define GCC_PCIE_1_PHY_BCR 12 macro
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D | qcom,gcc-sm8250.h | 224 #define GCC_PCIE_1_PHY_BCR 12 macro
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D | qcom,gcc-sc8180x.h | 260 #define GCC_PCIE_1_PHY_BCR 7 macro
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D | qcom,sa8775p-gcc.h | 277 #define GCC_PCIE_1_PHY_BCR 15 macro
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D | qcom,gcc-msm8996.h | 322 #define GCC_PCIE_1_PHY_BCR 82 macro
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D | qcom,gcc-sc8280xp.h | 411 #define GCC_PCIE_1_PHY_BCR 9 macro
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D | qcom,x1e80100-gcc.h | 408 #define GCC_PCIE_1_PHY_BCR 11 macro
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/linux-6.12.1/Documentation/devicetree/bindings/phy/ |
D | qcom,msm8996-qmp-pcie-phy.yaml | 168 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
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/linux-6.12.1/drivers/clk/qcom/ |
D | gcc-sdx75.c | 2869 [GCC_PCIE_1_PHY_BCR] = { 0x56000 },
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D | gcc-sm8450.c | 3183 [GCC_PCIE_1_PHY_BCR] = { 0x9e01c },
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D | gcc-msm8996.c | 3559 [GCC_PCIE_1_PHY_BCR] = { 0x6d038 },
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D | gcc-sc7280.c | 3399 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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D | gcc-sm8550.c | 3257 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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D | gcc-sm8250.c | 3548 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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D | gcc-sm8650.c | 3715 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
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D | gcc-apq8084.c | 3590 [GCC_PCIE_1_PHY_BCR] = { 0x1b80 },
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/linux-6.12.1/arch/arm64/boot/dts/qcom/ |
D | msm8996.dtsi | 722 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
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