Searched full:gcc_pcie_0_phy_bcr (Results 1 – 25 of 50) sorted by relevance
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| /linux-6.12.1/include/dt-bindings/reset/ |
| D | qcom,gcc-apq8084.h | 91 #define GCC_PCIE_0_PHY_BCR 82 macro
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| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | qcom,msm8998-qmp-pcie-phy.yaml | 92 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
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| D | qcom,msm8996-qmp-pcie-phy.yaml | 154 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | qcom,qdu1000-gcc.h | 151 #define GCC_PCIE_0_PHY_BCR 6 macro
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| D | qcom,gcc-qcs404.h | 166 #define GCC_PCIE_0_PHY_BCR 10 macro
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| D | qcom,gcc-sm6350.h | 166 #define GCC_PCIE_0_PHY_BCR 7 macro
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| D | qcom,sm4450-gcc.h | 170 #define GCC_PCIE_0_PHY_BCR 6 macro
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| D | qcom,gcc-sc7280.h | 210 #define GCC_PCIE_0_PHY_BCR 1 macro
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| D | qcom,sm8550-gcc.h | 190 #define GCC_PCIE_0_PHY_BCR 6 macro
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| D | qcom,gcc-sm8150.h | 218 #define GCC_PCIE_0_PHY_BCR 5 macro
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| D | qcom,gcc-sm8450.h | 206 #define GCC_PCIE_0_PHY_BCR 7 macro
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| D | qcom,gcc-sdm845.h | 229 #define GCC_PCIE_0_PHY_BCR 24 macro
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| D | qcom,sm8650-gcc.h | 213 #define GCC_PCIE_0_PHY_BCR 6 macro
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| D | qcom,gcc-sm8350.h | 221 #define GCC_PCIE_0_PHY_BCR 7 macro
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| D | qcom,gcc-sm8250.h | 219 #define GCC_PCIE_0_PHY_BCR 7 macro
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| D | qcom,gcc-msm8998.h | 282 #define GCC_PCIE_0_PHY_BCR 76 macro
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| D | qcom,gcc-sc8180x.h | 258 #define GCC_PCIE_0_PHY_BCR 5 macro
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| D | qcom,sa8775p-gcc.h | 272 #define GCC_PCIE_0_PHY_BCR 10 macro
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| D | qcom,gcc-msm8996.h | 320 #define GCC_PCIE_0_PHY_BCR 80 macro
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| D | qcom,gcc-sc8280xp.h | 406 #define GCC_PCIE_0_PHY_BCR 4 macro
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| D | qcom,x1e80100-gcc.h | 403 #define GCC_PCIE_0_PHY_BCR 6 macro
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| /linux-6.12.1/drivers/clk/qcom/ |
| D | gcc-qdu1000.c | 2596 [GCC_PCIE_0_PHY_BCR] = { 0x7c000 },
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| D | gcc-sm4450.c | 2770 [GCC_PCIE_0_PHY_BCR] = { 0x7c01c },
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| D | gcc-qcs404.c | 2777 [GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
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| D | gcc-sm8450.c | 3178 [GCC_PCIE_0_PHY_BCR] = { 0x7c01c },
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