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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dqcom,pcie2-phy.yaml75 resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>,
/linux-6.12.1/include/dt-bindings/clock/
Dqcom,gcc-qcs404.h168 #define GCC_PCIEPHY_0_PHY_BCR 12 macro
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dqcs404.dtsi969 resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>,
/linux-6.12.1/drivers/clk/qcom/
Dgcc-qcs404.c2779 [GCC_PCIEPHY_0_PHY_BCR] = { 0x3e03c },