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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dqcom,ipq8074-qmp-pcie-phy.yaml79 <&gcc GCC_PCIE0_PIPE_CLK>;
/linux-6.12.1/include/dt-bindings/clock/
Dqcom,gcc-ipq5018.h69 #define GCC_PCIE0_PIPE_CLK 60 macro
Dqcom,ipq9574-gcc.h219 #define GCC_PCIE0_PIPE_CLK 210 macro
Dqcom,gcc-ipq6018.h144 #define GCC_PCIE0_PIPE_CLK 135 macro
Dqcom,gcc-ipq8074.h124 #define GCC_PCIE0_PIPE_CLK 115 macro
/linux-6.12.1/drivers/clk/qcom/
Dgcc-ipq5018.c2081 static struct clk_branch gcc_pcie0_pipe_clk = { variable
2089 .name = "gcc_pcie0_pipe_clk",
3545 [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr,
Dgcc-ipq9574.c1575 static struct clk_branch gcc_pcie0_pipe_clk = { variable
1582 .name = "gcc_pcie0_pipe_clk",
4221 [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr,
Dgcc-ipq8074.c2451 static struct clk_branch gcc_pcie0_pipe_clk = { variable
2458 .name = "gcc_pcie0_pipe_clk",
4453 [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr,
Dgcc-ipq6018.c3493 static struct clk_branch gcc_pcie0_pipe_clk = { variable
3500 .name = "gcc_pcie0_pipe_clk",
4380 [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr,
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dipq6018.dtsi293 <&gcc GCC_PCIE0_PIPE_CLK>;
Dipq8074.dtsi206 <&gcc GCC_PCIE0_PIPE_CLK>;