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/linux-6.12.1/include/dt-bindings/clock/
Dqcom,gcc-sc7180.h32 #define GCC_DDRSS_GPU_AXI_CLK 22 macro
Dqcom,gcc-sm6350.h39 #define GCC_DDRSS_GPU_AXI_CLK 28 macro
Dqcom,sm7150-gcc.h33 #define GCC_DDRSS_GPU_AXI_CLK 21 macro
Dqcom,sm4450-gcc.h22 #define GCC_DDRSS_GPU_AXI_CLK 12 macro
Dqcom,gcc-sc7280.h30 #define GCC_DDRSS_GPU_AXI_CLK 20 macro
Dqcom,sm8550-gcc.h24 #define GCC_DDRSS_GPU_AXI_CLK 13 macro
Dqcom,gcc-sm8150.h29 #define GCC_DDRSS_GPU_AXI_CLK 19 macro
Dqcom,gcc-sm8450.h37 #define GCC_DDRSS_GPU_AXI_CLK 25 macro
Dqcom,gcc-sdm845.h28 #define GCC_DDRSS_GPU_AXI_CLK 18 macro
Dqcom,sm8650-gcc.h23 #define GCC_DDRSS_GPU_AXI_CLK 12 macro
Dqcom,gcc-sm8350.h37 #define GCC_DDRSS_GPU_AXI_CLK 25 macro
Dqcom,gcc-sm8250.h31 #define GCC_DDRSS_GPU_AXI_CLK 21 macro
Dqcom,gcc-sc8180x.h27 #define GCC_DDRSS_GPU_AXI_CLK 17 macro
Dqcom,sa8775p-gcc.h36 #define GCC_DDRSS_GPU_AXI_CLK 25 macro
Dqcom,gcc-sc8280xp.h48 #define GCC_DDRSS_GPU_AXI_CLK 37 macro
Dqcom,x1e80100-gcc.h46 #define GCC_DDRSS_GPU_AXI_CLK 36 macro
/linux-6.12.1/Documentation/devicetree/bindings/display/msm/
Dgmu.yaml305 <&gcc GCC_DDRSS_GPU_AXI_CLK>,
/linux-6.12.1/drivers/clk/qcom/
Dgcc-sc7180.c998 static struct clk_branch gcc_ddrss_gpu_axi_clk = { variable
1005 .name = "gcc_ddrss_gpu_axi_clk",
2259 [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr,
Dgcc-sm6350.c1072 static struct clk_branch gcc_ddrss_gpu_axi_clk = { variable
1081 .name = "gcc_ddrss_gpu_axi_clk",
2367 [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr,
Dgcc-sdm845.c1431 static struct clk_branch gcc_ddrss_gpu_axi_clk = { variable
1438 .name = "gcc_ddrss_gpu_axi_clk",
3543 [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr,
3696 [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr,
Dgcc-sm4450.c1170 static struct clk_branch gcc_ddrss_gpu_axi_clk = { variable
1179 .name = "gcc_ddrss_gpu_axi_clk",
2623 [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr,
Dgcc-sm8450.c1292 static struct clk_branch gcc_ddrss_gpu_axi_clk = { variable
1301 .name = "gcc_ddrss_gpu_axi_clk",
3015 [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr,
Dgcc-sm7150.c1193 static struct clk_branch gcc_ddrss_gpu_axi_clk = { variable
1200 .name = "gcc_ddrss_gpu_axi_clk",
2773 [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr,
Dgcc-sc7280.c1446 static struct clk_branch gcc_ddrss_gpu_axi_clk = { variable
1455 .name = "gcc_ddrss_gpu_axi_clk",
3205 [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr,
Dgcc-sm8550.c1381 static struct clk_branch gcc_ddrss_gpu_axi_clk = { variable
1390 .name = "gcc_ddrss_gpu_axi_clk",
3090 [GCC_DDRSS_GPU_AXI_CLK] = &gcc_ddrss_gpu_axi_clk.clkr,

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