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/linux-6.12.1/drivers/misc/eeprom/
Deeprom_93cx6.c7 * Abstract: EEPROM reader routines for 93cx6 chipsets.
18 MODULE_DESCRIPTION("EEPROM 93cx6 chip driver");
21 static inline void eeprom_93cx6_pulse_high(struct eeprom_93cx6 *eeprom) in eeprom_93cx6_pulse_high() argument
23 eeprom->reg_data_clock = 1; in eeprom_93cx6_pulse_high()
24 eeprom->register_write(eeprom); in eeprom_93cx6_pulse_high()
34 static inline void eeprom_93cx6_pulse_low(struct eeprom_93cx6 *eeprom) in eeprom_93cx6_pulse_low() argument
36 eeprom->reg_data_clock = 0; in eeprom_93cx6_pulse_low()
37 eeprom->register_write(eeprom); in eeprom_93cx6_pulse_low()
47 static void eeprom_93cx6_startup(struct eeprom_93cx6 *eeprom) in eeprom_93cx6_startup() argument
52 eeprom->register_read(eeprom); in eeprom_93cx6_startup()
[all …]
DKconfig2 menu "EEPROM support"
43 after you configure the board init code to know about each eeprom
53 If you say yes here you get read-only support for the user EEPROM of
54 the Maxim MAX6874/5 EEPROM-programmable, quad power-supply
64 tristate "EEPROM 93CX6 support"
66 This is a driver for the EEPROM chipsets 93c46 and 93c66.
72 tristate "Microwire EEPROM 93XX46 support"
78 Driver for the microwire EEPROM chipsets 93xx46x. The driver
80 erase the whole EEPROM.
93 EEPROM 93XX46 driver. sysfs entries will be created for that
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/linux-6.12.1/drivers/nvmem/
Dlpc18xx_eeprom.c3 * NXP LPC18xx/LPC43xx EEPROM memory NVMEM driver
38 /* EEPROM device requires a ~1500 kHz clock (min 800 kHz, max 1600 kHz) */
41 /* EEPROM requires 3 ms of erase/program time between each writing */
54 static inline void lpc18xx_eeprom_writel(struct lpc18xx_eeprom_dev *eeprom, in lpc18xx_eeprom_writel() argument
57 writel(val, eeprom->reg_base + reg); in lpc18xx_eeprom_writel()
60 static inline u32 lpc18xx_eeprom_readl(struct lpc18xx_eeprom_dev *eeprom, in lpc18xx_eeprom_readl() argument
63 return readl(eeprom->reg_base + reg); in lpc18xx_eeprom_readl()
66 static int lpc18xx_eeprom_busywait_until_prog(struct lpc18xx_eeprom_dev *eeprom) in lpc18xx_eeprom_busywait_until_prog() argument
71 /* Wait until EEPROM program operation has finished */ in lpc18xx_eeprom_busywait_until_prog()
75 val = lpc18xx_eeprom_readl(eeprom, LPC18XX_EEPROM_INTSTAT); in lpc18xx_eeprom_busywait_until_prog()
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Drave-sp-eeprom.c4 * EEPROM driver for RAVE SP
18 * enum rave_sp_eeprom_access_type - Supported types of EEPROM access
20 * @RAVE_SP_EEPROM_WRITE: EEPROM write
21 * @RAVE_SP_EEPROM_READ: EEPROM read
29 * enum rave_sp_eeprom_header_size - EEPROM command header sizes
31 * @RAVE_SP_EEPROM_HEADER_SMALL: EEPROM header size for "small" devices (< 8K)
32 * @RAVE_SP_EEPROM_HEADER_BIG: EEPROM header size for "big" devices (> 8K)
43 * struct rave_sp_eeprom_page - RAVE SP EEPROM page
59 * struct rave_sp_eeprom - RAVE SP EEPROM device
62 * @mutex: Lock protecting access to EEPROM
[all …]
/linux-6.12.1/drivers/i2c/
Di2c-slave-eeprom.c3 * I2C slave mode EEPROM simulator
9 * this driver does not support simulating EEPROM types which take more than
48 struct eeprom_data *eeprom = i2c_get_clientdata(client); in i2c_slave_eeprom_slave_cb() local
52 if (eeprom->idx_write_cnt < eeprom->num_address_bytes) { in i2c_slave_eeprom_slave_cb()
53 if (eeprom->idx_write_cnt == 0) in i2c_slave_eeprom_slave_cb()
54 eeprom->buffer_idx = 0; in i2c_slave_eeprom_slave_cb()
55 eeprom->buffer_idx = *val | (eeprom->buffer_idx << 8); in i2c_slave_eeprom_slave_cb()
56 eeprom->idx_write_cnt++; in i2c_slave_eeprom_slave_cb()
58 if (!eeprom->read_only) { in i2c_slave_eeprom_slave_cb()
59 spin_lock(&eeprom->buffer_lock); in i2c_slave_eeprom_slave_cb()
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/linux-6.12.1/drivers/net/wireless/mediatek/mt7601u/
Deeprom.c13 #include "eeprom.h"
51 /* Parts of eeprom not in the usage map (0x80-0xc0,0xf0) in mt7601u_efuse_read()
90 …dev_err(dev->dev, "Error: your device needs default EEPROM file and this driver doesn't support it… in mt7601u_efuse_physical_size_check()
98 mt7601u_has_tssi(struct mt7601u_dev *dev, u8 *eeprom) in mt7601u_has_tssi() argument
100 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1); in mt7601u_has_tssi()
106 mt7601u_set_chip_cap(struct mt7601u_dev *dev, u8 *eeprom) in mt7601u_set_chip_cap() argument
108 u16 nic_conf0 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_0); in mt7601u_set_chip_cap()
109 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1); in mt7601u_set_chip_cap()
114 dev->ee->tssi_enabled = mt7601u_has_tssi(dev, eeprom) && in mt7601u_set_chip_cap()
131 u8 *eeprom, u8 max_pwr) in mt7601u_set_channel_target_power() argument
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/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7996/
Deeprom.c8 #include "eeprom.h"
12 u8 *eeprom = dev->mt76.eeprom.data; in mt7996_check_eeprom() local
13 u16 val = get_unaligned_le16(eeprom); in mt7996_check_eeprom()
40 u8 *eeprom = dev->mt76.eeprom.data; in mt7996_eeprom_load_default() local
54 memcpy(eeprom, fw->data, MT7996_EEPROM_SIZE); in mt7996_eeprom_load_default()
86 /* read eeprom data from efuse */ in mt7996_eeprom_load()
123 u8 *eeprom = phy->dev->mt76.eeprom.data; in mt7996_eeprom_parse_band_config() local
124 u32 val = eeprom[MT_EE_WIFI_CONF]; in mt7996_eeprom_parse_band_config()
132 val = eeprom[MT_EE_WIFI_CONF + 1]; in mt7996_eeprom_parse_band_config()
161 u8 *eeprom = dev->mt76.eeprom.data; in mt7996_eeprom_parse_hw_cap() local
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/linux-6.12.1/drivers/media/usb/pvrusb2/
Dpvrusb2-eeprom.c9 #include "pvrusb2-eeprom.h"
19 Read and analyze data in the eeprom. Use tveeprom to figure out
27 /* We seem to only be interested in the last 128 bytes of the EEPROM */
30 /* Grab EEPROM contents, needed for direct method. */
34 u8 *eeprom; in pvr2_eeprom_fetch() local
42 eeprom = kzalloc(EEPROM_SIZE, GFP_KERNEL); in pvr2_eeprom_fetch()
43 if (!eeprom) { in pvr2_eeprom_fetch()
45 "Failed to allocate memory required to read eeprom"); in pvr2_eeprom_fetch()
49 trace_eeprom("Value for eeprom addr from controller was 0x%x", in pvr2_eeprom_fetch()
52 /* Seems that if the high bit is set, then the *real* eeprom in pvr2_eeprom_fetch()
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/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7915/
Deeprom.c6 #include "eeprom.h"
11 u8 *eeprom = mdev->eeprom.data; in mt7915_eeprom_load_precal() local
13 u32 size, val = eeprom[offs]; in mt7915_eeprom_load_precal()
44 u8 *eeprom = dev->mt76.eeprom.data; in mt7915_check_eeprom() local
45 u16 val = get_unaligned_le16(eeprom); in mt7915_check_eeprom()
95 u8 *eeprom = dev->mt76.eeprom.data; in mt7915_eeprom_load_default() local
109 memcpy(eeprom, fw->data, mt7915_eeprom_size(dev)); in mt7915_eeprom_load_default()
142 /* read eeprom data from efuse */ in mt7915_eeprom_load()
157 u8 *eeprom = dev->mt76.eeprom.data; in mt7915_eeprom_parse_band_config() local
161 val = eeprom[MT_EE_WIFI_CONF + band]; in mt7915_eeprom_parse_band_config()
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/linux-6.12.1/drivers/net/ethernet/intel/e1000e/
Dnvm.c7 * e1000_raise_eec_clk - Raise EEPROM clock
9 * @eecd: pointer to the EEPROM
11 * Enable/Raise the EEPROM clock bit.
22 * e1000_lower_eec_clk - Lower EEPROM clock
24 * @eecd: pointer to the EEPROM
26 * Clear/Lower the EEPROM clock bit.
37 * e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
39 * @data: data to send to the EEPROM
42 * We need to shift 'count' bits out to the EEPROM. So, the value in the
43 * "data" parameter will be shifted out to the EEPROM one bit at a time.
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/linux-6.12.1/include/linux/
Deeprom_93cx6.h10 Abstract: EEPROM reader datastructures for 93cx6 chipsets.
15 * EEPROM operation defines.
30 * for reading the eeprom data.
32 * @register_read(struct eeprom_93cx6 *eeprom): handler to
33 * read the eeprom register, this function should set all reg_* fields.
34 * @register_write(struct eeprom_93cx6 *eeprom): handler to
35 * write to the eeprom register by using all reg_* fields.
36 * @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines
44 * and the eeprom_93cx6 handlers for reading the eeprom.
49 void (*register_read)(struct eeprom_93cx6 *eeprom);
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/linux-6.12.1/drivers/net/ethernet/intel/igc/
Digc_nvm.c8 * igc_poll_eerd_eewr_done - Poll for EEPROM read/write completion
10 * @ee_reg: EEPROM flag for polling
12 * Polls the EEPROM status bit for either read or write completion based
39 * igc_acquire_nvm - Generic request for access to EEPROM
42 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
44 * EEPROM access and return -IGC_ERR_NVM (-1).
74 * igc_release_nvm - Release exclusive access to EEPROM
77 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
89 * igc_read_nvm_eerd - Reads EEPROM using EERD register
91 * @offset: offset of word in the EEPROM to read
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/linux-6.12.1/Documentation/devicetree/bindings/nvmem/
Dlpc1857-eeprom.txt1 * NXP LPC18xx EEPROM memory NVMEM driver
4 - compatible: Should be "nxp,lpc1857-eeprom"
8 - reg: EEPROM registers.
9 - mem: EEPROM address space.
12 - eeprom: EEPROM operating clock.
14 the EEPROM in reset.
15 - interrupts: Should contain EEPROM interrupt.
19 eeprom: eeprom@4000e000 {
20 compatible = "nxp,lpc1857-eeprom";
25 clock-names = "eeprom";
Dzii,rave-sp-eeprom.txt1 Zodiac Inflight Innovations RAVE EEPROM Bindings
3 RAVE SP EEPROM device is a "MFD cell" device exposing physical EEPROM
11 - compatible: Should be "zii,rave-sp-eeprom"
15 - zii,eeprom-name: Unique EEPROM identifier describing its function in the
29 eeprom@a4 {
30 compatible = "zii,rave-sp-eeprom";
34 zii,eeprom-name = "main-eeprom";
/linux-6.12.1/drivers/net/ethernet/intel/igb/
De1000_nvm.c11 * igb_raise_eec_clk - Raise EEPROM clock
13 * @eecd: pointer to the EEPROM
15 * Enable/Raise the EEPROM clock bit.
26 * igb_lower_eec_clk - Lower EEPROM clock
28 * @eecd: pointer to the EEPROM
30 * Clear/Lower the EEPROM clock bit.
41 * igb_shift_out_eec_bits - Shift data bits our to the EEPROM
43 * @data: data to send to the EEPROM
46 * We need to shift 'count' bits out to the EEPROM. So, the value in the
47 * "data" parameter will be shifted out to the EEPROM one bit at a time.
[all …]
/linux-6.12.1/drivers/net/wireless/intel/iwlwifi/dvm/
Deeprom.c16 /* EEPROM offset definitions */
31 /* corresponding link offsets in EEPROM */
67 /* SKU Capabilities (actual values from EEPROM definition) */
76 /* radio config bits (actual values from EEPROM definition) */
85 * EEPROM bands
87 * that they are stored in the EEPROM band information. Note
88 * that EEPROM bands aren't the same as mac80211 bands, and
89 * there are even special "ht40 bands" in the EEPROM.
148 /* EEPROM reading functions */
150 static u16 iwl_eeprom_query16(const u8 *eeprom, size_t eeprom_size, int offset) in iwl_eeprom_query16() argument
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/linux-6.12.1/drivers/staging/vt6655/
Dsrom.c6 * Purpose:Implement functions to access eeprom
13 * SROMbyReadEmbedded - Embedded read eeprom via MAC
14 * SROMbWriteEmbedded - Embedded write eeprom via MAC
15 * SROMvRegBitsOn - Set Bits On in eeprom
16 * SROMvRegBitsOff - Clear Bits Off in eeprom
17 * SROMbIsRegBitsOn - Test if Bits On in eeprom
18 * SROMbIsRegBitsOff - Test if Bits Off in eeprom
19 * SROMvReadAllContents - Read all contents in eeprom
20 * SROMvWriteAllContents - Write all contents in eeprom
21 * SROMvReadEtherAddress - Read Ethernet Address in eeprom
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/linux-6.12.1/drivers/net/ethernet/intel/ixgbe/
Dixgbe_x540.c181 * ixgbe_init_eeprom_params_X540 - Initialize EEPROM params
184 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
185 * ixgbe_hw struct in order to set up EEPROM access.
189 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_eeprom_params_X540() local
191 if (eeprom->type == ixgbe_eeprom_uninitialized) { in ixgbe_init_eeprom_params_X540()
195 eeprom->semaphore_delay = 10; in ixgbe_init_eeprom_params_X540()
196 eeprom->type = ixgbe_flash; in ixgbe_init_eeprom_params_X540()
200 eeprom->word_size = BIT(eeprom_size + in ixgbe_init_eeprom_params_X540()
203 hw_dbg(hw, "Eeprom params: type = %d, size = %d\n", in ixgbe_init_eeprom_params_X540()
204 eeprom->type, eeprom->word_size); in ixgbe_init_eeprom_params_X540()
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Dixgbe_common.c131 * 10gig parts do not have a word in the EEPROM to determine the in ixgbe_setup_fc_generic()
485 * ixgbe_read_pba_string_generic - Reads part number string from EEPROM
487 * @pba_num: stores the part number string from the EEPROM
490 * Reads the part number string from the EEPROM.
506 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data); in ixgbe_read_pba_string_generic()
512 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &pba_ptr); in ixgbe_read_pba_string_generic()
558 ret_val = hw->eeprom.ops.read(hw, pba_ptr, &length); in ixgbe_read_pba_string_generic()
580 ret_val = hw->eeprom.ops.read(hw, pba_ptr + offset, &data); in ixgbe_read_pba_string_generic()
600 * in order for the MAC address to have been loaded from the EEPROM into RAR0
695 /* Get MAC instance from EEPROM for configuring CS4227 */ in ixgbe_set_lan_id_multi_port_pcie()
[all …]
/linux-6.12.1/drivers/net/wireless/ralink/rt2x00/
Drt2800pci.c79 static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom) in rt2800pci_eepromregister_read() argument
81 struct rt2x00_dev *rt2x00dev = eeprom->data; in rt2800pci_eepromregister_read()
86 eeprom->reg_data_in = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_IN); in rt2800pci_eepromregister_read()
87 eeprom->reg_data_out = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_OUT); in rt2800pci_eepromregister_read()
88 eeprom->reg_data_clock = in rt2800pci_eepromregister_read()
90 eeprom->reg_chip_select = in rt2800pci_eepromregister_read()
94 static void rt2800pci_eepromregister_write(struct eeprom_93cx6 *eeprom) in rt2800pci_eepromregister_write() argument
96 struct rt2x00_dev *rt2x00dev = eeprom->data; in rt2800pci_eepromregister_write()
99 rt2x00_set_field32(&reg, E2PROM_CSR_DATA_IN, !!eeprom->reg_data_in); in rt2800pci_eepromregister_write()
100 rt2x00_set_field32(&reg, E2PROM_CSR_DATA_OUT, !!eeprom->reg_data_out); in rt2800pci_eepromregister_write()
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7615/
Deeprom.c10 #include "eeprom.h"
89 u16 val = get_unaligned_le16(dev->eeprom.data); in mt7615_check_eeprom()
104 u8 val, *eeprom = dev->mt76.eeprom.data; in mt7615_eeprom_parse_hw_band_cap() local
126 eeprom[MT_EE_WIFI_CONF]); in mt7615_eeprom_parse_hw_band_cap()
146 u8 *eeprom = dev->mt76.eeprom.data; in mt7615_eeprom_parse_hw_cap() local
154 eeprom[MT7663_EE_HW_CONF1]); in mt7615_eeprom_parse_hw_cap()
158 /* read tx-rx mask from eeprom */ in mt7615_eeprom_parse_hw_cap()
163 eeprom[MT_EE_NIC_CONF_0]); in mt7615_eeprom_parse_hw_cap()
277 u8 *eeprom = dev->mt76.eeprom.data; in mt7615_apply_cal_free_data() local
289 eeprom[ical[i]] = otp[ical[i]]; in mt7615_apply_cal_free_data()
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7603/
Deeprom.c5 #include "eeprom.h"
105 u8 *eeprom = dev->mt76.eeprom.data; in mt7603_apply_cal_free_data() local
109 if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp")) in mt7603_apply_cal_free_data()
121 eeprom[offset] = efuse[offset]; in mt7603_apply_cal_free_data()
139 u16 val = get_unaligned_le16(dev->eeprom.data); in mt7603_check_eeprom()
158 u8 *eeprom; in mt7603_eeprom_init() local
169 memcpy(dev->mt76.eeprom.data, dev->mt76.otp.data, in mt7603_eeprom_init()
173 eeprom = (u8 *)dev->mt76.eeprom.data; in mt7603_eeprom_init()
175 memcpy(dev->mphy.macaddr, eeprom + MT_EE_MAC_ADDR, ETH_ALEN); in mt7603_eeprom_init()
179 if (FIELD_GET(MT_EE_NIC_CONF_0_RX_PATH, eeprom[MT_EE_NIC_CONF_0]) == 1 || in mt7603_eeprom_init()
[all …]
/linux-6.12.1/drivers/net/ethernet/atheros/atl1e/
Datl1e_ethtool.c205 struct ethtool_eeprom *eeprom, u8 *bytes) in atl1e_get_eeprom() argument
214 if (eeprom->len == 0) in atl1e_get_eeprom()
220 eeprom->magic = hw->vendor_id | (hw->device_id << 16); in atl1e_get_eeprom()
222 first_dword = eeprom->offset >> 2; in atl1e_get_eeprom()
223 last_dword = (eeprom->offset + eeprom->len - 1) >> 2; in atl1e_get_eeprom()
237 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3), in atl1e_get_eeprom()
238 eeprom->len); in atl1e_get_eeprom()
245 struct ethtool_eeprom *eeprom, u8 *bytes) in atl1e_set_eeprom() argument
255 if (eeprom->len == 0) in atl1e_set_eeprom()
258 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) in atl1e_set_eeprom()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_eeprom.c35 /* EEPROM memory addresses are 19-bits long, which can
38 * "Device Type Identifier"--an I2C concept, which for EEPROM devices
39 * is hard-coded as 1010b, indicating that it is an EEPROM
43 * the EEPROM memory address. The format on the wire for EEPROM
52 * which is exactly the EEPROM memory address, or offset,
53 * in order to address up to 8 EEPROM devices on the I2C bus.
55 * For instance, a 2-Mbit I2C EEPROM part, addresses all its bytes,
67 * 2-Mbit EEPROM devices on the same bus, but see one contiguous
79 * That is, for an I2C EEPROM driver everything is controlled by
112 /* Set the EEPROM address we want to write to/read from. in __amdgpu_eeprom_xfer()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/eeprom/
Dmicrochip,93lc46b.yaml4 $id: http://devicetree.org/schemas/eeprom/microchip,93lc46b.yaml#
7 title: Microchip 93xx46 SPI compatible EEPROM family
19 - eeprom-93xx46
28 description: chip select of EEPROM
33 parameter-less property which disables writes to the EEPROM
39 of EEPROM (e.g. for SPI bus multiplexing)
62 eeprom@0 {
63 compatible = "eeprom-93xx46";

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