| /linux-6.12.1/drivers/hwtracing/coresight/ |
| D | Makefile | 3 # Makefile for CoreSight drivers.
25 obj-$(CONFIG_CORESIGHT) += coresight.o
26 coresight-y := coresight-core.o coresight-etm-perf.o coresight-platform.o \
27 coresight-sysfs.o coresight-syscfg.o coresight-config.o \
28 coresight-cfg-preload.o coresight-cfg-afdo.o \
29 coresight-syscfg-configfs.o coresight-trace-id.o
30 obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o
31 coresight-tmc-y := coresight-tmc-core.o coresight-tmc-etf.o \
32 coresight-tmc-etr.o
33 obj-$(CONFIG_CORESIGHT_SINK_TPIU) += coresight-tpiu.o
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| D | Kconfig | 3 # Coresight configuration
5 menuconfig CORESIGHT config
6 tristate "CoreSight Tracing Support"
13 This framework provides a kernel interface for the CoreSight debug
15 a topological view of the CoreSight components based on a DT
20 module will be called coresight.
22 if CORESIGHT
24 tristate "CoreSight Link and Sink drivers"
26 This enables support for CoreSight link and sink drivers that are
32 modules will be called coresight-funnel and coresight-replicator.
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| /linux-6.12.1/Documentation/ABI/testing/ |
| D | sysfs-bus-coresight-devices-etm4x | 1 What: /sys/bus/coresight/devices/etm<N>/enable_source
8 of coresight components linking the source to the sink is
9 configured and managed automatically by the coresight framework.
11 What: /sys/bus/coresight/devices/etm<N>/cpu
17 What: /sys/bus/coresight/devices/etm<N>/nr_pe_cmp
24 What: /sys/bus/coresight/devices/etm<N>/nr_addr_cmp
31 What: /sys/bus/coresight/devices/etm<N>/nr_cntr
38 What: /sys/bus/coresight/devices/etm<N>/nr_ext_inp
44 What: /sys/bus/coresight/devices/etm<N>/numcidc
51 What: /sys/bus/coresight/devices/etm<N>/numvmidc
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| D | sysfs-bus-coresight-devices-cti | 1 What: /sys/bus/coresight/devices/<cti-name>/enable
7 What: /sys/bus/coresight/devices/<cti-name>/powered
13 What: /sys/bus/coresight/devices/<cti-name>/ctmid
19 What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons
25 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name
31 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals
37 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_types
44 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_signals
50 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_types
57 What: /sys/bus/coresight/devices/<cti-name>/regs/inout_sel
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| D | sysfs-bus-coresight-devices-etm3x | 1 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/enable_source
8 of coresight components linking the source to the sink is
9 configured and managed automatically by the coresight framework.
11 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_idx
18 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_acctype
29 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_range
37 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_single
45 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_start
53 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/addr_stop
61 What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/cntr_idx
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| D | sysfs-bus-coresight-devices-tmc | 1 What: /sys/bus/coresight/devices/<memory_map>.tmc/trigger_cntr
10 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rsz
17 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/sts
24 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rrp
33 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rwp
39 the CoreSight bus into the Trace RAM. The value is read directly
42 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/trg
49 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ctl
56 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffsr
64 What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffcr
[all …]
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| D | sysfs-bus-coresight-devices-tpdm | 1 What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
15 What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset
25 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type
36 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts
47 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode
61 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx
70 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val
86 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask
98 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15]
105 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7]
[all …]
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| D | sysfs-bus-coresight-devices-etb10 | 1 What: /sys/bus/coresight/devices/<memory_map>.etb/enable_sink
10 echo 1 > /sys/bus/coresight/devices/20010000.etb/enable_sink
12 What: /sys/bus/coresight/devices/<memory_map>.etb/trigger_cntr
22 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rdp
29 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/sts
36 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rrp
45 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rwp
51 the CoreSight bus into the Trace RAM. The value is read directly
54 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/trg
61 What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/ctl
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/arm/ |
| D | arm,coresight-dummy-sink.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
7 title: ARM Coresight Dummy sink component
10 CoreSight components are compliant with the ARM CoreSight architecture
17 The Coresight dummy sink component is for the specific coresight sink devices
18 kernel don't have permission to access or configure, e.g., CoreSight EUD on
21 register it as Coresight sink device in kernel side, so that path can be
23 coresight link of AP processor. It provides Coresight API for operations on
25 the Coresight dummy source paths for debugging.
27 The primary use case of the coresight dummy sink is to build path in kernel
40 - arm,coresight-dummy-sink
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| D | arm,coresight-dummy-source.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml#
7 title: ARM Coresight Dummy source component
10 CoreSight components are compliant with the ARM CoreSight architecture
17 The Coresight dummy source component is for the specific coresight source
19 there would be Coresight source trace components on sub-processor which
21 is needed to register them as Coresight source devices, so that paths can be
22 created in the driver. It provides Coresight API for operations on dummy
24 Coresight dummy source paths for debugging.
26 The primary use case of the coresight dummy source is to build path in kernel
39 - arm,coresight-dummy-source
[all …]
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| D | arm,coresight-etm.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,coresight-etm.yaml#
7 title: Arm CoreSight Embedded Trace MacroCell
16 CoreSight components are compliant with the ARM CoreSight architecture
31 - arm,coresight-etm3x
32 - arm,coresight-etm4x
33 - arm,coresight-etm4x-sysreg
43 const: arm,coresight-etm4x-sysreg
56 - arm,coresight-etm3x
57 - arm,coresight-etm4x
61 const: arm,coresight-etm4x-sysreg
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| D | arm,coresight-cti.yaml | 5 $id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#
8 title: ARM Coresight Cross Trigger Interface (CTI) device.
11 The CoreSight Embedded Cross Trigger (ECT) consists of CTI devices connected
12 to one or more CoreSight components and/or a CPU, with CTIs interconnected in
15 not part of the CoreSight graph.
37 indicate this feature (arm,coresight-cti-v8-arch).
48 between CTI and other CoreSight components.
50 Certain triggers between CoreSight devices and the CTI have specific types
52 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
59 Note that some hardware trigger signals can be connected to non-CoreSight
[all …]
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| D | qcom,coresight-tpda.yaml | 5 $id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml#
23 Enable coresight sink first.
25 echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
26 echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
27 echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
28 echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
30 The test data will be collected in the coresight sink which is enabled.
45 - qcom,coresight-tpda
54 - const: qcom,coresight-tpda
75 Output connections from the TPDA to legacy CoreSight trace bus.
[all …]
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| D | arm,embedded-trace-extension.yaml | 16 allows tracing the CPU execution. It overlaps with the CoreSight ETMv4
18 The trace generated by the ETE could be stored via legacy CoreSight
21 legacy CoreSight components, a node must be listed per instance, along
22 with any optional connection graph as per the coresight bindings.
41 Output connections from the ETE to legacy CoreSight trace bus.
45 description: Output connection from the ETE to legacy CoreSight Trace bus.
56 # An ETE node without legacy CoreSight connections
62 # An ETE node with legacy CoreSight connections
68 out-ports { /* legacy coresight connection */
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| D | arm,coresight-etb10.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,coresight-etb10.yaml#
7 title: Arm CoreSight Embedded Trace Buffer
16 CoreSight components are compliant with the ARM CoreSight architecture
23 The CoreSight Embedded Trace Buffer stores traces in a dedicated SRAM that is
31 const: arm,coresight-etb10
41 - const: arm,coresight-etb10
66 description: Input connection from CoreSight Trace bus.
81 compatible = "arm,coresight-etb10", "arm,primecell";
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| D | arm,coresight-tpiu.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,coresight-tpiu.yaml#
7 title: Arm CoreSight Trace Port Interface Unit
16 CoreSight components are compliant with the ARM CoreSight architecture
23 The CoreSight Trace Port Interface Unit captures trace data from the trace bus
31 const: arm,coresight-tpiu
41 - const: arm,coresight-tpiu
66 description: Input connection from the CoreSight Trace bus.
81 compatible = "arm,coresight-tpiu", "arm,primecell";
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| D | arm,coresight-dynamic-replicator.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
7 title: Arm Coresight Programmable Trace Bus Replicator
16 CoreSight components are compliant with the ARM CoreSight architecture
23 The Coresight replicator splits a single trace stream into two trace streams
31 const: arm,coresight-dynamic-replicator
41 - const: arm,coresight-dynamic-replicator
72 description: Input connection from CoreSight Trace bus
80 description: Output connections to CoreSight Trace bus
96 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
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| D | arm,coresight-dynamic-funnel.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml#
7 title: Arm CoreSight Programmable Trace Bus Funnel
16 CoreSight components are compliant with the ARM CoreSight architecture
23 The Coresight funnel merges 2-8 trace sources into a single trace
31 const: arm,coresight-dynamic-funnel
41 - const: arm,coresight-dynamic-funnel
65 description: Input connections from CoreSight Trace bus
74 description: Output connection to CoreSight Trace bus
90 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
|
| /linux-6.12.1/arch/arm64/boot/dts/hisilicon/ |
| D | hi6220-coresight.dtsi | 3 * dtsi file for Hisilicon Hi6220 coresight
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
39 compatible = "arm,coresight-tmc", "arm,primecell";
64 compatible = "arm,coresight-static-replicator";
100 compatible = "arm,coresight-tmc", "arm,primecell";
116 compatible = "arm,coresight-tpiu", "arm,primecell";
132 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
217 compatible = "arm,coresight-etm4x", "arm,primecell";
236 compatible = "arm,coresight-etm4x", "arm,primecell";
255 compatible = "arm,coresight-etm4x", "arm,primecell";
[all …]
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| D | hi3660-coresight.dtsi | 4 * dtsi for Hisilicon Hi3660 Coresight
15 compatible = "arm,coresight-etm4x", "arm,primecell";
32 compatible = "arm,coresight-etm4x", "arm,primecell";
49 compatible = "arm,coresight-etm4x", "arm,primecell";
66 compatible = "arm,coresight-etm4x", "arm,primecell";
83 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
132 compatible = "arm,coresight-tmc", "arm,primecell";
158 compatible = "arm,coresight-etm4x", "arm,primecell";
175 compatible = "arm,coresight-etm4x", "arm,primecell";
192 compatible = "arm,coresight-etm4x", "arm,primecell";
[all …]
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| /linux-6.12.1/Documentation/trace/coresight/ |
| D | coresight.rst | 2 Coresight - HW Assisted Tracing on ARM
11 Coresight is an umbrella of technologies allowing for the debugging of ARM
24 flows through the coresight system (via ATB bus) using links that are connecting
25 the emanating source to a sink(s). Sinks serve as endpoints to the coresight
28 host without fear of filling up the onboard coresight memory buffer.
30 At typical coresight system would look like this::
85 a way to aggregate and distribute signals between CoreSight components.
87 The coresight framework provides a central point to represent, configure and
88 manage coresight devices on a platform. This first implementation centers on
133 See ``Documentation/devicetree/bindings/arm/arm,coresight-*.yaml`` for details.
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| D | coresight-perf.rst | 4 CoreSight - Perf
10 Perf is able to locally access CoreSight trace data and store it to the
18 a perf.data trace file. That file would have AUX sections if CoreSight
28 . ... CoreSight ETM Trace data: size 73168 bytes
40 If you see these above, then your system is tracing CoreSight data
43 To compile perf with CoreSight support in the tools/perf directory do::
45 make CORESIGHT=1
53 For complete information on building perf with CoreSight support and
59 Kernel CoreSight Support
62 You will also want CoreSight support enabled in your kernel config.
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| D | coresight-tpda.rst | 22 Root: ``/sys/bus/coresight/devices/tpda<N>``
27 The tpdm and tpda nodes should be observed at the coresight path
28 "/sys/bus/coresight/devices".
30 /sys/bus/coresight/devices # ls -l | grep tpd
35 Enable coresight sink first. The port of tpda which is connected to
38 echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
39 echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
40 echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
41 echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
43 The test data will be collected in the coresight sink which is enabled.
[all …]
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| D | coresight-trbe.rst | 15 gets plugged in as a coresight sink device because the corresponding trace
18 The TRBE is not compliant to CoreSight architecture specifications, but is
19 driven via the CoreSight driver framework to support the ETE (which is
20 CoreSight compliant) integration.
25 The TRBE devices appear on the existing coresight bus alongside the other
26 coresight devices::
28 >$ ls /sys/bus/coresight/devices
33 >$ ls /sys/bus/coresight/devices/trbe0/
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| /linux-6.12.1/drivers/perf/arm_cspmu/ |
| D | Kconfig | 6 tristate "ARM Coresight Architecture PMU"
10 based on ARM CoreSight PMU architecture. Note that this PMU
11 architecture does not have relationship with the ARM CoreSight
15 tristate "NVIDIA Coresight Architecture PMU"
19 (PMU) devices based on ARM CoreSight PMU architecture.
22 tristate "Ampere Coresight Architecture PMU"
26 (PMU) devices based on ARM CoreSight PMU architecture.
|