Searched full:channel0 (Results 1 – 25 of 57) sorted by relevance
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| /linux-6.12.1/Documentation/leds/ |
| D | leds-lp5521.rst | 57 - /sys/class/leds/lp5521:channel0/led_current - RW
58 - /sys/class/leds/lp5521:channel0/max_current - RO
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| /linux-6.12.1/Documentation/devicetree/bindings/display/bridge/ |
| D | fsl,imx8qxp-ldb.yaml | 24 have to be different. Channel0 outputs odd pixels and channel1 outputs
30 data. In split mode, channel0 outputs odd pixels and channel1 outputs even
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| D | fsl,imx8qxp-pixel-link.yaml | 103 /* from dc0 pixel combiner channel0 */
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| /linux-6.12.1/Documentation/devicetree/bindings/net/can/ |
| D | renesas,rcar-canfd.yaml | 105 - channel0
209 channel0 {
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| /linux-6.12.1/drivers/mfd/ |
| D | mxs-lradc.c | 57 DEFINE_RES_IRQ_NAMED(MX23_LRADC_CH0_IRQ, "mxs-lradc-channel0"),
76 DEFINE_RES_IRQ_NAMED(MX28_LRADC_CH0_IRQ, "mxs-lradc-channel0"),
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| /linux-6.12.1/arch/arm64/boot/dts/renesas/ |
| D | white-hawk-common.dtsi | 31 channel0 {
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| D | r8a779a0-falcon.dts | 49 channel0 {
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| D | rz-smarc-common.dtsi | 86 channel0 {
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| D | r8a77970-eagle.dts | 125 channel0 {
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| D | r8a779h0-gray-hawk-single.dts | 193 channel0 {
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| D | condor-common.dtsi | 107 channel0 {
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| /linux-6.12.1/Documentation/devicetree/bindings/iio/adc/ |
| D | ti,palmas-gpadc.yaml | 44 ti,channel0-current-microamp:
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| /linux-6.12.1/Documentation/iio/ |
| D | iio_devbuf.rst | 126 - channel0: index: 0, type: be:u16/16>>0
138 If only channel0 and channel3 are enabled, the data will be aligned in the
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| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | fsl,imx8qm-lvds-phy.yaml | 37 Index 0 is for LVDS channel0 and index 1 is for LVDS channel1.
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| /linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr-channel.yaml | 110 lpddr-channel0 {
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| /linux-6.12.1/tools/virtio/virtio-trace/ |
| D | README | 61 id=channel0,name=agent-ctl-path\
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| /linux-6.12.1/drivers/gpu/drm/bridge/imx/ |
| D | imx8qm-ldb.c | 233 "failed to power on channel0 PHY: %d\n", in imx8qm_ldb_bridge_atomic_enable()
269 "failed to power off channel0 PHY: %d\n", in imx8qm_ldb_bridge_atomic_disable()
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| D | imx8qxp-ldb.c | 508 * Channel numbers have to be different, because channel0 in imx8qxp_ldb_parse_dt_companion()
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| /linux-6.12.1/drivers/clocksource/ |
| D | timer-imx-tpm.c | 217 * 4) Channel0 disabled in tpm_timer_init()
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| /linux-6.12.1/arch/arm/mach-spear/ |
| D | time.c | 32 #define CLKEVT 0 /* gpt0, channel0 as clockevent */
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| /linux-6.12.1/drivers/media/platform/ti/davinci/ |
| D | vpif.h | 262 /* inline function to enable/disable channel0 */
280 /* inline function to enable interrupt for channel0 */
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| D | vpif.c | 254 /* Channel0 */
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| /linux-6.12.1/drivers/iio/adc/ |
| D | mxs-lradc-adc.c | 43 "mxs-lradc-channel0",
54 "mxs-lradc-channel0",
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| /linux-6.12.1/arch/arm/boot/dts/marvell/ |
| D | dove.dtsi | 327 channel0 {
347 channel0 {
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| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | umc_v6_7.c | 509 /* Enabling fatal error in umc instance0 channel0 will be in umc_v6_7_query_ras_poison_mode()
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