/linux-6.12.1/drivers/crypto/amcc/ |
D | crypto4xx_sa.h | 275 get_dynamic_sa_offset_state_ptr_field(struct dynamic_sa_ctl *cts) in get_dynamic_sa_offset_state_ptr_field() argument 279 offset = cts->sa_contents.bf.key_size in get_dynamic_sa_offset_state_ptr_field() 280 + cts->sa_contents.bf.inner_size in get_dynamic_sa_offset_state_ptr_field() 281 + cts->sa_contents.bf.outer_size in get_dynamic_sa_offset_state_ptr_field() 282 + cts->sa_contents.bf.spi in get_dynamic_sa_offset_state_ptr_field() 283 + cts->sa_contents.bf.seq_num0 in get_dynamic_sa_offset_state_ptr_field() 284 + cts->sa_contents.bf.seq_num1 in get_dynamic_sa_offset_state_ptr_field() 285 + cts->sa_contents.bf.seq_num_mask0 in get_dynamic_sa_offset_state_ptr_field() 286 + cts->sa_contents.bf.seq_num_mask1 in get_dynamic_sa_offset_state_ptr_field() 287 + cts->sa_contents.bf.seq_num_mask2 in get_dynamic_sa_offset_state_ptr_field() [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_afmt.c | 34 /* Clock N CTS N CTS N CTS */ 49 * calculate CTS and N values if they are not found in the table 51 static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq) in amdgpu_afmt_calc_cts() argument 53 int n, cts; in amdgpu_afmt_calc_cts() local 58 cts = clock * 1000; in amdgpu_afmt_calc_cts() 61 div = gcd(n, cts); in amdgpu_afmt_calc_cts() 64 cts /= div; in amdgpu_afmt_calc_cts() 73 cts *= mul; in amdgpu_afmt_calc_cts() 82 *CTS = cts; in amdgpu_afmt_calc_cts() 84 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", in amdgpu_afmt_calc_cts() [all …]
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/linux-6.12.1/drivers/crypto/intel/keembay/ |
D | Kconfig | 17 enabled: ecb(aes), cts(cbc(aes)), ecb(sm4) and cts(cbc(sm4)). 31 bool "Support for Intel Keem Bay OCS AES/SM4 CTS HW acceleration" 35 AES/SM4 CBC with CTS mode hardware acceleration for use with 38 Provides OCS version of cts(cbc(aes)) and cts(cbc(sm4)). 40 Intel does not recommend use of CTS mode with AES/SM4.
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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
D | imx6qdl-dhcom-drc02.dtsi | 15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD 16 * card must be disabled and the uart1 rts/cts must be output on other DHCOM 73 * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs 74 * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts. 77 cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */ 86 * controlled by DHCOM GPIO P. So remove rts/cts pins and the property 121 * M: uart1 cts
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/linux-6.12.1/drivers/gpu/drm/bridge/adv7511/ |
D | adv7511_audio.c | 18 unsigned int *cts, unsigned int *n) in adv7511_calc_cts_n() argument 34 *cts = ((f_tmds * *n) / (128 * fs)) * 1000; in adv7511_calc_cts_n() 39 unsigned int cts = 0; in adv7511_update_cts_n() local 42 adv7511_calc_cts_n(adv7511->f_tmds, adv7511->f_audio, &cts, &n); in adv7511_update_cts_n() 49 (cts >> 16) & 0xf); in adv7511_update_cts_n() 51 (cts >> 8) & 0xff); in adv7511_update_cts_n() 53 cts & 0xff); in adv7511_update_cts_n() 171 /* enable N/CTS, enable Audio sample packets */ in audio_startup() 174 /* enable N/CTS */ in audio_startup()
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
D | marvell,armada-370-pinctrl.txt | 26 mpp10 10 gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi) 48 mpp27 27 gpio, ge0(rxd4), ge1(rxd2), uart0(cts) 59 mpp38 38 gpio, dev(ready), uart1(cts), uart0(cts) 73 mpp50 50 gpio, dev(ad11), uart0(cts), sd0(d1), spi1(miso), 82 mpp56 56 gpio, dev(cs2), uart1(cts), uart0(cts), spi0(cs3), 92 mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0), 93 audio(mclk), uart0(cts)
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D | marvell,kirkwood-pinctrl.txt | 34 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq), 43 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs) 72 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq), 81 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs) 116 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq), 125 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs), 165 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq), 174 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs), 228 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), mii(crs), 238 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs), [all …]
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D | marvell,dove-pinctrl.txt | 19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu* 23 uart1(cts), lcd-spi(cs1), pmu* 25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu* 35 mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp), 40 mpp17 17 gpio, uart3(cts), sdio0(wp), ac97(sdi2), twsi(sda), 47 uart1(cts), ssp(sfrm) 49 lcd-spi(mosi), uart1(cts), ssp(txd)
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D | marvell,armada-38x-pinctrl.txt | 23 mpp5 5 gpio, ge(mdio), ua1(rxd), ua0(cts) 37 mpp19 19 gpio, ge0(col), ptp(evreq), ge0(txerr), sata1(prsnt), ua0(cts) 42 mpp24 24 gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready) 57 mpp39 39 gpio, i2c1(sck), ge1(rxd2), ua0(cts), sd0(d1), dev(a2) 59 mpp41 41 gpio, ua1(rxd), ge1(rxctl), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0) 73 mpp55 55 gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0), ua1(rxd)
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D | marvell,armada-39x-pinctrl.txt | 23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio) 37 mpp19 19 gpio, sata1(prsnt) [1], ua0(cts), ua1(rxd), i2c2(sda) 43 mpp24 24 gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready) 58 mpp39 39 gpio, i2c1(sck), ua0(cts), sd0(d1), dev(a2), ge(rxd2) 60 mpp41 41 gpio, ua1(rxd), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0), ge(rxctl) 77 mpp55 55 gpio, ua1(cts), spi1(cs1), sd0(d0), ua1(rxd), ua3(rxd)
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/linux-6.12.1/net/sunrpc/ |
D | Kconfig | 47 SHA-1 digests. These include aes128-cts-hmac-sha1-96 and 48 aes256-cts-hmac-sha1-96. 60 camellia128-cts-cmac and camellia256-cts-cmac. 72 SHA-2 digests. These include aes128-cts-hmac-sha256-128 and 73 aes256-cts-hmac-sha384-192.
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/linux-6.12.1/Documentation/devicetree/bindings/serial/ |
D | serial.yaml | 28 cts-gpios: 32 the UART's CTS line. 68 for RTS/CTS hardware flow control, and that they are available for use 76 cts-rts-swap: 78 description: CTS and RTS pins are swapped. 116 cts-gpios: false
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D | microchip,pic32-uart.txt | 14 - cts-gpios: CTS pin for UART 28 cts-gpios = <&gpio1 15 0>;
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D | st,stm32-uart.yaml | 50 # cts-gpios and rts-gpios properties can be used instead of 'uart-has-rtscts' 54 # It should be noted that both cts-gpios/rts-gpios and 'uart-has-rtscts' or 56 cts-gpios: true 88 cts-gpios: false
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D | cirrus,clps711x-uart.txt | 11 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD 28 cts-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
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/linux-6.12.1/drivers/gpu/drm/msm/hdmi/ |
D | hdmi_audio.c | 26 uint32_t cts; /* CTS parameter for clock regeneration */ member 110 /* Clear N/CTS selection bits */ in msm_hdmi_audio_update() 114 uint32_t n, cts, multiplier; in msm_hdmi_audio_update() local 119 cts = arcs->lut[audio->rate].cts; in msm_hdmi_audio_update() 133 DBG("n=%u, cts=%u, multiplier=%u", n, cts, multiplier); in msm_hdmi_audio_update() 153 HDMI_ACR_0_CTS(cts)); in msm_hdmi_audio_update()
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/linux-6.12.1/tools/firewire/ |
D | decode-fcp.c | 141 uint32_t cts:4; member 186 switch (frame->cts) { in decode_fcp() 191 printf("cal fcp frame (cts=0x01)\n"); in decode_fcp() 194 printf("ehs fcp frame (cts=0x02)\n"); in decode_fcp() 197 printf("havi fcp frame (cts=0x03)\n"); in decode_fcp() 200 printf("vendor specific fcp frame (cts=0x0e)\n"); in decode_fcp() 203 printf("extended cts\n"); in decode_fcp() 206 printf("reserved fcp frame (ctx=0x%02x)\n", frame->cts); in decode_fcp()
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/linux-6.12.1/drivers/gpu/drm/omapdrm/dss/ |
D | hdmi_common.c | 52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) in hdmi_compute_acr() argument 57 if (n == NULL || cts == NULL) in hdmi_compute_acr() 65 * specification) yields to an non-integer CTS. Hence, we in hdmi_compute_acr() 145 /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */ in hdmi_compute_acr() 146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10); in hdmi_compute_acr()
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/linux-6.12.1/drivers/video/fbdev/omap2/omapfb/dss/ |
D | hdmi_common.c | 52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) in hdmi_compute_acr() argument 57 if (n == NULL || cts == NULL) in hdmi_compute_acr() 65 * specification) yields to an non-integer CTS. Hence, we in hdmi_compute_acr() 145 /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */ in hdmi_compute_acr() 146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10); in hdmi_compute_acr()
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/linux-6.12.1/samples/bpf/ |
D | cpustat_kern.c | 106 u64 *cts, *pts, *cstate, *pstate, prev_state, cur_ts, delta; in bpf_prog1() local 116 cts = bpf_map_lookup_elem(&my_map, &key); in bpf_prog1() 117 if (!cts) in bpf_prog1() 138 if (!*cts) { in bpf_prog1() 139 *cts = bpf_ktime_get_ns(); in bpf_prog1() 144 delta = cur_ts - *cts; in bpf_prog1() 145 *cts = cur_ts; in bpf_prog1() 194 * cts cur_ts in bpf_prog1()
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/linux-6.12.1/Documentation/ABI/testing/ |
D | sysfs-class-led-trigger-tty | 24 What: /sys/class/leds/<tty_led>/cts 28 CTS = Clear To Send 31 If set to 0 (default), the LED will not evaluate CTS. 32 If set to 1, the LED will evaluate CTS.
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/linux-6.12.1/net/sunrpc/auth_gss/ |
D | gss_krb5_test.c | 469 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 1", 477 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 2", 485 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 3", 493 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 4", 501 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 5", 509 .desc = "Encrypt with aes128-cts-hmac-sha1-96 case 6", 662 .desc = "Derive Kc subkey for camellia128-cts-cmac", 669 .desc = "Derive Ke subkey for camellia128-cts-cmac", 676 .desc = "Derive Ki subkey for camellia128-cts-cmac", 683 .desc = "Derive Kc subkey for camellia256-cts-cmac", [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx8mm-venice-gw72xx-0x-rs232-rts.dtso | 5 * GW72xx RS232 with RTS/CTS hardware flow control: 8 * - UART4_RX becomes CTS 31 cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
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D | imx8mm-venice-gw73xx-0x-rs232-rts.dtso | 5 * GW73xx RS232 with RTS/CTS hardware flow control: 8 * - UART4_RX becomes CTS 35 cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
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/linux-6.12.1/drivers/staging/vt6656/ |
D | rxtx.h | 106 /* CTS buffer header */ 121 /* cts g */ 123 /* no rts/cts */ 143 struct vnt_rrv_time_cts cts; member
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