| /linux-6.12.1/drivers/gpu/drm/ci/xfails/ |
| D | msm-sdm845-fails.txt | 6 kms_color@ctm-0-25,Fail
7 kms_color@ctm-0-50,Fail
8 kms_color@ctm-0-75,Fail
9 kms_color@ctm-blue-to-red,Fail
10 kms_color@ctm-green-to-red,Fail
11 kms_color@ctm-negative,Fail
12 kms_color@ctm-red-to-blue,Fail
13 kms_color@ctm-signed,Fail
|
| D | msm-sc7180-trogdor-lazor-limozeen-fails.txt | 6 kms_color@ctm-0-25,Fail
7 kms_color@ctm-0-50,Fail
8 kms_color@ctm-0-75,Fail
9 kms_color@ctm-blue-to-red,Fail
10 kms_color@ctm-green-to-red,Fail
11 kms_color@ctm-negative,Fail
12 kms_color@ctm-red-to-blue,Fail
13 kms_color@ctm-signed,Fail
|
| D | msm-sc7180-trogdor-kingoftown-fails.txt | 6 kms_color@ctm-0-25,Fail
7 kms_color@ctm-0-50,Fail
8 kms_color@ctm-0-75,Fail
9 kms_color@ctm-blue-to-red,Fail
10 kms_color@ctm-green-to-red,Fail
11 kms_color@ctm-negative,Fail
12 kms_color@ctm-red-to-blue,Fail
13 kms_color@ctm-signed,Fail
|
| /linux-6.12.1/drivers/gpu/drm/vc4/ |
| D | vc4_kms.c | 30 struct drm_color_ctm *ctm; member
139 struct drm_color_ctm *ctm = ctm_state->ctm; in vc4_ctm_commit() local
143 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]), in vc4_ctm_commit()
145 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[3]), in vc4_ctm_commit()
147 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[6]), in vc4_ctm_commit()
150 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[1]), in vc4_ctm_commit()
152 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[4]), in vc4_ctm_commit()
154 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[7]), in vc4_ctm_commit()
157 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[2]), in vc4_ctm_commit()
159 VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[5]), in vc4_ctm_commit()
[all …]
|
| /linux-6.12.1/Documentation/trace/coresight/ |
| D | coresight-ect.rst | 4 CoreSight Embedded Cross Trigger (CTI & CTM).
15 devices and interconnects them via the Cross Trigger Matrix (CTM) to other
24 0000000 : CTI :<=========>*CTM*<====>: CTI :---+
33 become active. The active channel is propagated to other CTIs via the CTM,
53 All the CTI devices are associated with a CTM. On many systems there will be a
54 single effective CTM (one CTM, or multiple CTMs all interconnected), but it is
55 possible that systems can have nets of CTIs+CTM that are not interconnected by
56 a CTM to each other. On these systems a CTM index is declared to associate
57 CTI devices that are interconnected via a given CTM.
82 * ``ctmid`` : associated CTM - only relevant if system has multiple CTI+CTM
[all …]
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| D | coresight.rst | 55 ******************** Cross Trigger Matrix (CTM) *******************
84 all trace data are carried out-of-band on the ATB bus. The CTM provides
318 via the CTM. See (Documentation/trace/coresight/coresight-ect.rst)
663 The CTI & CTM Modules
668 channels on the CTM (Cross Trigger Matrix).
|
| /linux-6.12.1/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_color.c | 46 * interface exposes CRTC degamma, CRTC CTM and CRTC regamma while our hardware
49 * Plane CTM -> Plane degamma -> Plane CTM -> Plane regamma -> Plane CTM
70 * Plane DGM Bypass -> Plane CTM Bypass -> Plane RGM Bypass -> ...
71 * CRTC DGM Bypass -> CRTC CTM Bypass -> CRTC RGM Bypass
418 * __drm_ctm_to_dc_matrix - converts a DRM CTM to a DC CSC float matrix
419 * @ctm: DRM color transformation matrix
424 static void __drm_ctm_to_dc_matrix(const struct drm_color_ctm *ctm, in __drm_ctm_to_dc_matrix() argument
444 /* gamut_remap_matrix[i] = ctm[i - floor(i/4)] */ in __drm_ctm_to_dc_matrix()
445 matrix[i] = amdgpu_dm_fixpt_from_s3132(ctm->matrix[i - (i / 4)]); in __drm_ctm_to_dc_matrix()
450 * __drm_ctm_3x4_to_dc_matrix - converts a DRM CTM 3x4 to a DC CSC float matrix
[all …]
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| D | amdgpu_dm_plane.c | 1471 if (old_dm_plane_state->ctm) in amdgpu_dm_plane_drm_plane_duplicate_state()
1472 dm_plane_state->ctm = in amdgpu_dm_plane_drm_plane_duplicate_state()
1473 drm_property_blob_get(old_dm_plane_state->ctm); in amdgpu_dm_plane_drm_plane_duplicate_state()
1561 if (dm_plane_state->ctm) in amdgpu_dm_plane_drm_plane_destroy_state()
1562 drm_property_blob_put(dm_plane_state->ctm); in amdgpu_dm_plane_drm_plane_destroy_state()
1603 /* Only enable plane CTM if both DPP and MPC gamut remap is available. */ in dm_atomic_plane_attach_color_mgmt_properties()
1667 &dm_plane_state->ctm, in dm_atomic_plane_set_property()
1735 *val = (dm_plane_state->ctm) ? in dm_atomic_plane_get_property()
1736 dm_plane_state->ctm->base.id : 0; in dm_atomic_plane_get_property()
|
| /linux-6.12.1/drivers/gpu/drm/omapdrm/ |
| D | omap_crtc.c | 381 static void omap_crtc_cpr_coefs_from_ctm(const struct drm_color_ctm *ctm, in omap_crtc_cpr_coefs_from_ctm() argument
384 cpr->rr = omap_crtc_s31_32_to_s2_8(ctm->matrix[0]); in omap_crtc_cpr_coefs_from_ctm()
385 cpr->rg = omap_crtc_s31_32_to_s2_8(ctm->matrix[1]); in omap_crtc_cpr_coefs_from_ctm()
386 cpr->rb = omap_crtc_s31_32_to_s2_8(ctm->matrix[2]); in omap_crtc_cpr_coefs_from_ctm()
387 cpr->gr = omap_crtc_s31_32_to_s2_8(ctm->matrix[3]); in omap_crtc_cpr_coefs_from_ctm()
388 cpr->gg = omap_crtc_s31_32_to_s2_8(ctm->matrix[4]); in omap_crtc_cpr_coefs_from_ctm()
389 cpr->gb = omap_crtc_s31_32_to_s2_8(ctm->matrix[5]); in omap_crtc_cpr_coefs_from_ctm()
390 cpr->br = omap_crtc_s31_32_to_s2_8(ctm->matrix[6]); in omap_crtc_cpr_coefs_from_ctm()
391 cpr->bg = omap_crtc_s31_32_to_s2_8(ctm->matrix[7]); in omap_crtc_cpr_coefs_from_ctm()
392 cpr->bb = omap_crtc_s31_32_to_s2_8(ctm->matrix[8]); in omap_crtc_cpr_coefs_from_ctm()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/arm/ |
| D | malidp_crtc.c | 199 * Check if there is a new CTM and if it contains valid input. Valid here means
209 struct drm_color_ctm *ctm; in malidp_crtc_atomic_check_ctm() local
215 if (!state->ctm) in malidp_crtc_atomic_check_ctm()
218 if (crtc->state->ctm && (crtc->state->ctm->base.id == in malidp_crtc_atomic_check_ctm()
219 state->ctm->base.id)) in malidp_crtc_atomic_check_ctm()
223 * The size of the ctm is checked in in malidp_crtc_atomic_check_ctm()
226 ctm = (struct drm_color_ctm *)state->ctm->data; in malidp_crtc_atomic_check_ctm()
227 for (i = 0; i < ARRAY_SIZE(ctm->matrix); ++i) { in malidp_crtc_atomic_check_ctm()
229 s64 val = ctm->matrix[i]; in malidp_crtc_atomic_check_ctm()
|
| D | malidp_drv.c | 99 if (!crtc->state->ctm) { in malidp_atomic_commit_update_coloradj()
106 if (!old_state->ctm || (crtc->state->ctm->base.id != in malidp_atomic_commit_update_coloradj()
107 old_state->ctm->base.id)) in malidp_atomic_commit_update_coloradj()
|
| /linux-6.12.1/Documentation/devicetree/bindings/arm/ |
| D | arm,coresight-cti.yaml | 13 a star topology via the Cross Trigger Matrix (CTM), which is not programmable.
24 CTIs are interconnected in a star topology via the CTM, using a number of
101 arm,cti-ctm-id:
104 Defines the CTM this CTI is connected to, in large systems with multiple
105 separate CTI/CTM nets. Typically multi-socket systems where the CTM is
278 arm,cti-ctm-id = <1>;
|
| /linux-6.12.1/drivers/hwtracing/coresight/ |
| D | coresight-cti.h | 100 * @ctm_id: which CTM this device is connected to (by default it is
101 * assumed there is a single CTM per SoC, ID 0).
120 * @nr_ctm_channels: number of available CTM channels - from ID register.
135 * @ctigate: gate channel output from CTI to CTM.
168 * @ctidev: Extra information needed by the CTI/CTM framework.
|
| /linux-6.12.1/drivers/gpu/drm/arm/display/komeda/ |
| D | komeda_color_mgmt.c | 118 struct drm_color_ctm *ctm; in drm_ctm_to_coeffs() local
124 ctm = ctm_blob->data; in drm_ctm_to_coeffs()
127 coeffs[i] = drm_color_ctm_s31_32_to_qm_n(ctm->matrix[i], 3, 12); in drm_ctm_to_coeffs()
|
| /linux-6.12.1/drivers/gpu/drm/tidss/ |
| D | tidss_dispc.c | 2500 static void dispc_k2g_cpr_from_ctm(const struct drm_color_ctm *ctm, in dispc_k2g_cpr_from_ctm() argument
2506 cpr->m[CSC_RR] = dispc_S31_32_to_s2_8(ctm->matrix[0]); in dispc_k2g_cpr_from_ctm()
2507 cpr->m[CSC_RG] = dispc_S31_32_to_s2_8(ctm->matrix[1]); in dispc_k2g_cpr_from_ctm()
2508 cpr->m[CSC_RB] = dispc_S31_32_to_s2_8(ctm->matrix[2]); in dispc_k2g_cpr_from_ctm()
2509 cpr->m[CSC_GR] = dispc_S31_32_to_s2_8(ctm->matrix[3]); in dispc_k2g_cpr_from_ctm()
2510 cpr->m[CSC_GG] = dispc_S31_32_to_s2_8(ctm->matrix[4]); in dispc_k2g_cpr_from_ctm()
2511 cpr->m[CSC_GB] = dispc_S31_32_to_s2_8(ctm->matrix[5]); in dispc_k2g_cpr_from_ctm()
2512 cpr->m[CSC_BR] = dispc_S31_32_to_s2_8(ctm->matrix[6]); in dispc_k2g_cpr_from_ctm()
2513 cpr->m[CSC_BG] = dispc_S31_32_to_s2_8(ctm->matrix[7]); in dispc_k2g_cpr_from_ctm()
2514 cpr->m[CSC_BB] = dispc_S31_32_to_s2_8(ctm->matrix[8]); in dispc_k2g_cpr_from_ctm()
[all …]
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| /linux-6.12.1/Documentation/ABI/testing/ |
| D | sysfs-bus-coresight-devices-cti | 17 Description: (Read) Display the associated CTM ID
141 Description: (Write) Attach a CTI input trigger to a CTM channel.
147 Description: (Write) Detach a CTI input trigger from a CTM channel.
153 Description: (Write) Attach a CTI output trigger to a CTM channel.
159 Description: (Write) Detach a CTI output trigger from a CTM channel.
|
| /linux-6.12.1/drivers/gpu/drm/mediatek/ |
| D | mtk_disp_ccorr.c | 107 struct drm_property_blob *blob = state->ctm; in mtk_ccorr_ctm_set()
108 struct drm_color_ctm *ctm; in mtk_ccorr_ctm_set() local
118 ctm = (struct drm_color_ctm *)blob->data; in mtk_ccorr_ctm_set()
119 input = ctm->matrix; in mtk_ccorr_ctm_set()
|
| /linux-6.12.1/drivers/gpu/drm/msm/ |
| D | msm_atomic.c | 192 if ((old_crtc_state->ctm && !new_crtc_state->ctm) || in msm_atomic_check()
193 (!old_crtc_state->ctm && new_crtc_state->ctm)) { in msm_atomic_check()
|
| /linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_crtc.c | 742 struct drm_color_ctm *ctm; in _dpu_crtc_get_pcc_coeff() local
746 ctm = (struct drm_color_ctm *)state->ctm->data; in _dpu_crtc_get_pcc_coeff()
748 if (!ctm) in _dpu_crtc_get_pcc_coeff()
751 cfg->r.r = CONVERT_S3_15(ctm->matrix[0]); in _dpu_crtc_get_pcc_coeff()
752 cfg->g.r = CONVERT_S3_15(ctm->matrix[1]); in _dpu_crtc_get_pcc_coeff()
753 cfg->b.r = CONVERT_S3_15(ctm->matrix[2]); in _dpu_crtc_get_pcc_coeff()
755 cfg->r.g = CONVERT_S3_15(ctm->matrix[3]); in _dpu_crtc_get_pcc_coeff()
756 cfg->g.g = CONVERT_S3_15(ctm->matrix[4]); in _dpu_crtc_get_pcc_coeff()
757 cfg->b.g = CONVERT_S3_15(ctm->matrix[5]); in _dpu_crtc_get_pcc_coeff()
759 cfg->r.b = CONVERT_S3_15(ctm->matrix[6]); in _dpu_crtc_get_pcc_coeff()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_color.c | 119 * Extract the CSC coefficient from a CTM coefficient (in U32.32 fixed point
124 * of the CTM coefficient and we write the value from bit 3. We also round the
416 (crtc_state->hw.degamma_lut || crtc_state->hw.ctm); in ilk_lut_limited_range()
442 const struct drm_color_ctm *ctm = crtc_state->hw.ctm->data; in ilk_csc_convert_ctm() local
454 input = ctm_mult_by_limited(temp, ctm->matrix); in ilk_csc_convert_ctm()
456 input = ctm->matrix; in ilk_csc_convert_ctm()
502 if (crtc_state->hw.ctm) { in ilk_assign_csc()
541 if (crtc_state->hw.ctm) { in icl_assign_csc()
607 const struct drm_color_ctm *ctm = crtc_state->hw.ctm->data; in vlv_wgc_csc_convert_ctm() local
611 csc->coeff[i] = ctm_to_twos_complement(ctm->matrix[i], 2, 10); in vlv_wgc_csc_convert_ctm()
[all …]
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| D | intel_atomic.c | 252 if (crtc_state->hw.ctm) in intel_crtc_duplicate_state()
253 drm_property_blob_get(crtc_state->hw.ctm); in intel_crtc_duplicate_state()
289 drm_property_blob_put(crtc_state->hw.ctm); in intel_crtc_put_color_blobs()
|
| /linux-6.12.1/drivers/gpu/drm/ |
| D | drm_color_mgmt.c | 61 * “CTM”:
62 * Blob property to set the current transformation matrix (CTM) apply to
70 * matrix through &drm_crtc_state.ctm.
329 /* Set GAMMA_LUT and reset DEGAMMA_LUT and CTM */ in drm_crtc_legacy_gamma_set()
332 replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL); in drm_crtc_legacy_gamma_set()
|
| /linux-6.12.1/drivers/gpu/drm/nouveau/dispnv50/ |
| D | base907c.c | 138 const struct drm_color_ctm *ctm) in base907c_csc() argument
150 *val = csc_drm_to_base(ctm->matrix[j * 3 + i]); in base907c_csc()
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| D | wndw.c | 421 if (wndw->func->csc && asyh->state.ctm) { in nv50_wndw_atomic_check_lut()
422 const struct drm_color_ctm *ctm = asyh->state.ctm->data; in nv50_wndw_atomic_check_lut() local
423 wndw->func->csc(wndw, asyw, ctm); in nv50_wndw_atomic_check_lut()
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| /linux-6.12.1/Documentation/gpu/amdgpu/display/ |
| D | display-manager.rst | 58 color transformation matrix (CTM) and gamma, and two properties for degamma and
63 CRTC gamma after blending, and CRTC degamma pre-blending. Although CTM is
|