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/linux-6.12.1/Documentation/devicetree/bindings/perf/
Dmarvell-cn10k-tad.yaml4 $id: http://devicetree.org/schemas/perf/marvell-cn10k-tad.yaml#
7 title: Marvell CN10K LLC-TAD performance monitor
13 The Tag-and-Data units (TADs) maintain coherence and contain CN10K
23 const: marvell,cn10k-tad-pmu
57 compatible = "marvell,cn10k-tad-pmu";
Dmarvell-cn10k-ddr.yaml4 $id: http://devicetree.org/schemas/perf/marvell-cn10k-ddr.yaml#
7 title: Marvell CN10K DDR performance monitor
16 - marvell,cn10k-ddr-pmu
34 compatible = "marvell,cn10k-ddr-pmu";
/linux-6.12.1/drivers/char/hw_random/
Dcn10k-rng.c2 /* Marvell CN10K RVU Hardware Random Number Generator.
34 /* Octeon CN10K-A A0/A1, CNF10K-A A0/A1 and CNF10K-B A0/B0
48 /* CN10K-A A0/A1 */ in cn10k_is_extended_trng_regs_supported()
194 "cn10k-rng-%s", dev_name(&pdev->dev)); in cn10k_rng_probe()
227 MODULE_DESCRIPTION("Marvell CN10K HW RNG Driver");
DMakefile49 obj-$(CONFIG_HW_RANDOM_CN10K) += cn10k-rng.o
DKconfig556 tristate "Marvell CN10K Random Number Generator support"
561 generator available in Marvell CN10K SoCs.
/linux-6.12.1/Documentation/misc-devices/
Dmrvl_cn10k_dpi.rst4 Marvell CN10K DMA packet interface (DPI) driver
10 DPI is a DMA packet interface hardware block in Marvell's CN10K silicon.
21 /dev/mrvl-cn10k-dpi node to set DMA engine and PEM (PCIe interface) port
/linux-6.12.1/drivers/perf/
DKconfig234 tristate "Marvell CN10K LLC-TAD PMU"
238 performance monitors on CN10K family silicons.
257 tristate "Enable MARVELL CN10K DRAM Subsystem(DSS) PMU Support"
261 event on CN10K platform.
Dmarvell_cn10k_ddr_pmu.c2 /* Marvell CN10K DRAM Subsystem (DSS) Performance Monitor Driver
691 pr_info("CN10K DDR PMU Driver for ddrc@%llx\n", res->start); in cn10k_ddr_perf_probe()
713 { .compatible = "marvell,cn10k-ddr-pmu", },
729 .name = "cn10k-ddr-pmu",
744 "perf/marvell/cn10k/ddr:online", NULL, in cn10k_ddr_pmu_init()
766 MODULE_DESCRIPTION("Marvell CN10K DRAM Subsystem (DSS) Performance Monitor Driver");
Dmarvell_cn10k_tad_pmu.c2 /* Marvell CN10K LLC-TAD perf driver
365 { .compatible = "marvell,cn10k-tad-pmu", },
412 "perf/cn10k/tadpmu:online", in tad_pmu_init()
434 MODULE_DESCRIPTION("Marvell CN10K LLC-TAD Perf driver");
/linux-6.12.1/drivers/net/ethernet/marvell/octeontx2/af/
Dlmac_common.h2 /* Marvell CN10K RPM driver
80 /* Unlike CN10K which shares same CSR offset with CGX
Dcommon.h146 #define CN10K_MAX_DWRR_WEIGHT 16384 /* Weight is 14bit on CN10K */
148 /* Don't change the order as on CN10K (except CN10KB)
Dmcs.h2 /* Marvell CN10K MCS driver
212 /* CN10K-B APIs */
Dmbox.h913 /* CN10K NIX AQ enqueue msg */
2211 u64 pkt_ctl_cnt; /* CN10K-B */
2231 /* Only for CN10K-B */
2256 u64 octet_decrypt_cnt; /* CN10K-B */
2257 u64 octet_validate_cnt; /* CN10K-B */
2261 u64 octet_encrypt_cnt; /* CN10K-B */
2262 u64 octet_protected_cnt; /* CN10K-B */
Drpm.h2 /* Marvell CN10K RPM driver
Drvu.h1024 /* CN10K RVU */
1028 /* CN10K NIX */
1031 /* CN10K RVU - LMT*/
1055 /* CN10K MCS */
Dmcs_rvu_if.c2 /* Marvell CN10K MCS driver
471 /* CN10K-B has only one mcs block */ in rvu_mcs_flr_handler()
881 /* Needed only for CN10K-B */ in rvu_mcs_init()
Drvu_struct.h373 /* CN10K NIX Receive queue context structure */
461 /* CN10K NIX Send queue context structure */
/linux-6.12.1/drivers/net/ethernet/marvell/octeontx2/nic/
DMakefile10 otx2_flows.o otx2_tc.o cn10k.o otx2_dmac_flt.o \
Dotx2_vf.c16 #include "cn10k.h"
317 /* For cn10k platform, VF mailbox region is in its BAR2 in otx2vf_vfaf_mbox_init()
Dqos_sq.c11 #include "cn10k.h"
/linux-6.12.1/include/uapi/misc/
Dmrvl_cn10k_dpi.h3 * Marvell Octeon CN10K DPI driver
/linux-6.12.1/drivers/crypto/marvell/octeontx2/
Dotx2_cptpf_ucode.h26 /* Maximum number of supported engines/cores on OcteonTX2/CN10K platform */
Dotx2_cptvf_main.c85 /* For cn10k platform, VF mailbox region is in its BAR2 in cptvf_pfvf_mbox_init()
/linux-6.12.1/drivers/misc/
DKconfig599 tristate "Octeon CN10K DPI driver"
603 Enables Octeon CN10K DMA packet interface (DPI) driver which
Dmrvl_cn10k_dpi.c2 /* Marvell Octeon CN10K DPI driver
675 MODULE_DESCRIPTION("Marvell Octeon CN10K DPI Driver");

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