Searched full:clk_usbh20 (Results 1 – 8 of 8) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/usb/ |
D | samsung,exynos-usb2.yaml | 77 clocks = <&clock CLK_USBH20>; 103 clocks = <&clock CLK_USBH20>;
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/linux-6.12.1/arch/arm/boot/dts/samsung/ |
D | exynos5410.dtsi | 417 clocks = <&clock CLK_USBH20>; 422 clocks = <&clock CLK_USBH20>; 427 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
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D | exynos5420.dtsi | 1377 clocks = <&clock CLK_USBH20>; 1382 clocks = <&clock CLK_USBH20>; 1387 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
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/linux-6.12.1/include/dt-bindings/clock/ |
D | exynos5410.h | 59 #define CLK_USBH20 365 macro
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D | exynos5420.h | 125 #define CLK_USBH20 365 macro
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/linux-6.12.1/Documentation/devicetree/bindings/phy/ |
D | samsung,usb2-phy.yaml | 98 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
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/linux-6.12.1/drivers/clk/samsung/ |
D | clk-exynos5410.c | 224 GATE(CLK_USBH20, "usbh20", "aclk200_fsys", GATE_IP_FSYS, 18, 0, 0),
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D | clk-exynos5420.c | 1047 GATE(CLK_USBH20, "usbh20", "aclk200_fsys", GATE_IP_FSYS, 18, 0, 0),
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