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Searched full:clk_top_vcodecpll_370p5 (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/media/
Dmediatek,vcodec-decoder.yaml181 <&topckgen CLK_TOP_VCODECPLL_370P5>;
195 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
Dmediatek,vcodec-encoder.yaml185 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;
/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt6795-clk.h86 #define CLK_TOP_VCODECPLL_370P5 75 macro
Dmt8173-clk.h88 #define CLK_TOP_VCODECPLL_370P5 78 macro
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi1414 <&topckgen CLK_TOP_VCODECPLL_370P5>;
1428 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
1530 <&topckgen CLK_TOP_VCODECPLL_370P5>;
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt6795-topckgen.c443 FACTOR(CLK_TOP_VCODECPLL_370P5, "vcodecpll_370p5", "vcodecpll", 1, 4),
Dclk-mt8173-topckgen.c522 FACTOR(CLK_TOP_VCODECPLL_370P5, "vcodecpll_370p5", "vcodecpll", 1, 4),