Searched full:clk_top_apll12_ck_div0 (Results 1 – 12 of 12) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/sound/ |
D | mt8186-afe-pcm.yaml | 141 <&topckgen 131>, //CLK_TOP_APLL12_CK_DIV0
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D | mediatek,mt8188-afe.yaml | 196 <&topckgen 186>, //CLK_TOP_APLL12_CK_DIV0
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/linux-6.12.1/include/dt-bindings/clock/ |
D | mt8516-clk.h | 196 #define CLK_TOP_APLL12_CK_DIV0 164 macro
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D | mediatek,mt8365-clk.h | 122 #define CLK_TOP_APLL12_CK_DIV0 112 macro
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D | mt8186-clk.h | 150 #define CLK_TOP_APLL12_CK_DIV0 131 macro
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D | mediatek,mt8188-clk.h | 190 #define CLK_TOP_APLL12_CK_DIV0 179 macro
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/linux-6.12.1/drivers/clk/mediatek/ |
D | clk-mt8516.c | 479 DIV_ADJ(CLK_TOP_APLL12_CK_DIV0, "apll12_ck_div0", "aud_i2s0_m_sel",
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D | clk-mt8186-topckgen.c | 672 DIV_GATE(CLK_TOP_APLL12_CK_DIV0, "apll12_div0", "apll_i2s0_mck_sel",
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D | clk-mt8167.c | 668 DIV_ADJ(CLK_TOP_APLL12_CK_DIV0, "apll12_ck_div0", "aud_i2s0_m_sel",
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D | clk-mt8365.c | 553 DIV_ADJ_F(CLK_TOP_APLL12_CK_DIV0, "apll12_ck_div0", "apll_i2s0_sel",
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D | clk-mt8188-topckgen.c | 1182 DIV_GATE(CLK_TOP_APLL12_CK_DIV0, "apll12_div0", "top_i2si1", 0x0320, 0, 0x0328, 8, 0),
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt8186.dtsi | 1516 <&topckgen CLK_TOP_APLL12_CK_DIV0>,
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