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Searched full:clk_sclk_spi1 (Results 1 – 19 of 19) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dexynos5250.h52 #define CLK_SCLK_SPI1 155 macro
Dexynos7-clk.h42 #define CLK_SCLK_SPI1 8 macro
Dexynos5420.h37 #define CLK_SCLK_SPI1 136 macro
Dexynos4.h73 #define CLK_SCLK_SPI1 160 macro
Dexynos3250.h252 #define CLK_SCLK_SPI1 244 macro
Dexynos5433.h427 #define CLK_SCLK_SPI1 32 macro
/linux-6.12.1/Documentation/devicetree/bindings/spi/
Dsamsung,spi.yaml137 <&cmu_peric CLK_SCLK_SPI1>,
/linux-6.12.1/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi226 <&clock_top0 CLK_SCLK_SPI1>,
Dexynos5433.dtsi1484 <&cmu_peric CLK_SCLK_SPI1>,
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos3250.dtsi841 clocks = <&cmu CLK_SPI1>, <&cmu CLK_SCLK_SPI1>;
Dexynos4.dtsi636 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
Dexynos5250.dtsi526 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
Dexynos5420.dtsi676 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
/linux-6.12.1/drivers/clk/samsung/
Dclk-exynos5250.c513 GATE(CLK_SCLK_SPI1, "sclk_spi1", "div_spi_pre1",
Dclk-exynos7.c350 GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_sclk_spi1",
Dclk-exynos3250.c563 GATE(CLK_SCLK_SPI1, "sclk_spi1", "div_spi1_pre",
Dclk-exynos4.c795 GATE(CLK_SCLK_SPI1, "sclk_spi1", "div_spi_pre1", SRC_MASK_PERIL1, 20,
Dclk-exynos5420.c992 GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_spi1_pre",
Dclk-exynos5433.c1736 GATE(CLK_SCLK_SPI1, "sclk_spi1", "sclk_spi1_peric", ENABLE_SCLK_PERIC,