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/linux-6.12.1/Documentation/devicetree/bindings/pwm/
Dmediatek,mt2712-pwm.yaml86 <&pericfg CLK_PERI_PWM0>, <&pericfg CLK_PERI_PWM1>,
/linux-6.12.1/include/dt-bindings/clock/
Dmt2712-clk.h241 #define CLK_PERI_PWM0 2 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt2712.c887 GATE_PERI0(CLK_PERI_PWM0, "per_pwm0", "pwm_sel", 2),
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi484 <&pericfg CLK_PERI_PWM0>,