/linux-6.12.1/include/dt-bindings/clock/ |
D | exynos5410.h | 40 #define CLK_I2C0 261 macro
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D | microchip,mpfs-clock.h | 26 #define CLK_I2C0 15 macro
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D | actions,s500-cmu.h | 39 #define CLK_I2C0 19 macro
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D | thead,th1520-clk-ap.h | 74 #define CLK_I2C0 64 macro
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D | actions,s700-cmu.h | 74 #define CLK_I2C0 50 macro
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D | actions,s900-cmu.h | 56 #define CLK_I2C0 38 macro
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D | exynos5250.h | 98 #define CLK_I2C0 294 macro
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D | s5pv210.h | 169 #define CLK_I2C0 151 macro
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D | exynos5420.h | 70 #define CLK_I2C0 261 macro
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D | exynos4.h | 155 #define CLK_I2C0 317 macro
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D | exynos3250.h | 220 #define CLK_I2C0 214 macro
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D | sprd,sc9860-clk.h | 90 #define CLK_I2C0 7 macro
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D | rockchip,rk3576-cru.h | 512 #define CLK_I2C0 494 macro
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D | rockchip,rv1126-cru.h | 26 #define CLK_I2C0 12 macro
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/linux-6.12.1/Documentation/devicetree/bindings/i2c/ |
D | i2c-owl.yaml | 58 clocks = <&cmu CLK_I2C0>;
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D | samsung,s3c2410-i2c.yaml | 115 clocks = <&clock CLK_I2C0>;
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/linux-6.12.1/drivers/clk/hisilicon/ |
D | clk-hix5hd2.c | 101 {HIX5HD2_I2C0_CLK, "clk_i2c0", "100m", 103 {HIX5HD2_I2C0_RST, "rst_i2c0", "clk_i2c0",
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D | crg-hi3798cv200.c | 105 { HISTB_I2C0_CLK, "clk_i2c0", "clk_apb",
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/linux-6.12.1/drivers/clk/actions/ |
D | owl-s700.c | 204 static OWL_GATE(clk_i2c0, "i2c0", "hosc", CMU_DEVCLKEN1, 0, 0, 0); 459 &clk_i2c0.common, 542 [CLK_I2C0] = &clk_i2c0.common.hw,
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/linux-6.12.1/arch/arm64/boot/dts/actions/ |
D | s700.dtsi | 183 clocks = <&cmu CLK_I2C0>;
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D | s900.dtsi | 195 clocks = <&cmu CLK_I2C0>;
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/linux-6.12.1/arch/arm/boot/dts/actions/ |
D | owl-s500.dtsi | 199 clocks = <&cmu CLK_I2C0>;
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/linux-6.12.1/drivers/clk/samsung/ |
D | clk-exynos5410.c | 204 GATE(CLK_I2C0, "i2c0", "aclk66", GATE_IP_PERIC, 6, 0, 0),
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/linux-6.12.1/arch/arm/boot/dts/samsung/ |
D | exynos5410.dtsi | 263 clocks = <&clock CLK_I2C0>;
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/linux-6.12.1/drivers/clk/microchip/ |
D | clk-mpfs.c | 321 CLK_PERIPH(CLK_I2C0, "clk_periph_i2c0", PARENT_CLK(AHB), 12, 0),
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