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/linux-6.12.1/include/dt-bindings/clock/
Dexynos5410.h40 #define CLK_I2C0 261 macro
Dmicrochip,mpfs-clock.h26 #define CLK_I2C0 15 macro
Dactions,s500-cmu.h39 #define CLK_I2C0 19 macro
Dthead,th1520-clk-ap.h74 #define CLK_I2C0 64 macro
Dactions,s700-cmu.h74 #define CLK_I2C0 50 macro
Dactions,s900-cmu.h56 #define CLK_I2C0 38 macro
Dexynos5250.h98 #define CLK_I2C0 294 macro
Ds5pv210.h169 #define CLK_I2C0 151 macro
Dexynos5420.h70 #define CLK_I2C0 261 macro
Dexynos4.h155 #define CLK_I2C0 317 macro
Dexynos3250.h220 #define CLK_I2C0 214 macro
Dsprd,sc9860-clk.h90 #define CLK_I2C0 7 macro
Drockchip,rk3576-cru.h512 #define CLK_I2C0 494 macro
Drockchip,rv1126-cru.h26 #define CLK_I2C0 12 macro
/linux-6.12.1/Documentation/devicetree/bindings/i2c/
Di2c-owl.yaml58 clocks = <&cmu CLK_I2C0>;
Dsamsung,s3c2410-i2c.yaml115 clocks = <&clock CLK_I2C0>;
/linux-6.12.1/drivers/clk/hisilicon/
Dclk-hix5hd2.c101 {HIX5HD2_I2C0_CLK, "clk_i2c0", "100m",
103 {HIX5HD2_I2C0_RST, "rst_i2c0", "clk_i2c0",
Dcrg-hi3798cv200.c105 { HISTB_I2C0_CLK, "clk_i2c0", "clk_apb",
/linux-6.12.1/drivers/clk/actions/
Dowl-s700.c204 static OWL_GATE(clk_i2c0, "i2c0", "hosc", CMU_DEVCLKEN1, 0, 0, 0);
459 &clk_i2c0.common,
542 [CLK_I2C0] = &clk_i2c0.common.hw,
/linux-6.12.1/arch/arm64/boot/dts/actions/
Ds700.dtsi183 clocks = <&cmu CLK_I2C0>;
Ds900.dtsi195 clocks = <&cmu CLK_I2C0>;
/linux-6.12.1/arch/arm/boot/dts/actions/
Dowl-s500.dtsi199 clocks = <&cmu CLK_I2C0>;
/linux-6.12.1/drivers/clk/samsung/
Dclk-exynos5410.c204 GATE(CLK_I2C0, "i2c0", "aclk66", GATE_IP_PERIC, 6, 0, 0),
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos5410.dtsi263 clocks = <&clock CLK_I2C0>;
/linux-6.12.1/drivers/clk/microchip/
Dclk-mpfs.c321 CLK_PERIPH(CLK_I2C0, "clk_periph_i2c0", PARENT_CLK(AHB), 12, 0),

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