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Searched full:clk_apmixed_apll1 (Results 1 – 25 of 31) sorted by relevance

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/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8516-apmixedsys.c68 PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0, 0,
Dclk-mt8167-apmixedsys.c67 PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0, 0,
Dclk-mt2712-apmixedsys.c88 PLL(CLK_APMIXED_APLL1, "apll1", 0x0330, 0x0340, 0x00000100,
Dclk-mt8188-apmixedsys.c79 PLL(CLK_APMIXED_APLL1, "apll1", 0x0304, 0x0314, 0,
Dclk-mt8365-apmixedsys.c95 PLL(CLK_APMIXED_APLL1, "apll1", 0x031C, 0x032C, 0x00000001, 0, 32,
Dclk-mt8186-apmixedsys.c75 PLL(CLK_APMIXED_APLL1, "apll1", 0x0334, 0x0344, 0,
Dclk-mt6795-apmixedsys.c59 PLL(CLK_APMIXED_APLL1, "apll1", 0x2a0, 0x2b0, 0, 0, 31, 0x2a0, 4, 0x2a8, 0x2a4, 0),
Dclk-mt8192-apmixedsys.c89 PLL_B(CLK_APMIXED_APLL1, "apll1", 0x0318, 0x0328, 0x00000000,
Dclk-mt8173-apmixedsys.c76 PLL(CLK_APMIXED_APLL1, "apll1", 0x2a0, 0x2b0, 0, 0, 31, 0x2a0, 4, 0x2a4, 0x2a4, 0),
Dclk-mt8183-apmixedsys.c136 PLL(CLK_APMIXED_APLL1, "apll1", 0x02A0, 0x02B0, 0,
Dclk-mt8195-apmixedsys.c94 PLL(CLK_APMIXED_APLL1, "apll1", 0x07c0, 0x0dc0, 0,
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dmt8186-afe-pcm.yaml129 <&apmixedsys 12>, //CLK_APMIXED_APLL1
Dmediatek,mt8188-afe.yaml194 <&apmixedsys 9>, //CLK_APMIXED_APLL1
/linux-6.12.1/include/dt-bindings/clock/
Dmt8516-clk.h17 #define CLK_APMIXED_APLL1 4 macro
Dmediatek,mt6795-clk.h150 #define CLK_APMIXED_APLL1 9 macro
Dmt6797-clk.h116 #define CLK_APMIXED_APLL1 9 macro
Dmt8173-clk.h166 #define CLK_APMIXED_APLL1 11 macro
Dmt6765-clk.h18 #define CLK_APMIXED_APLL1 8 macro
Dmediatek,mt8365-clk.h237 #define CLK_APMIXED_APLL1 6 macro
Dmt2712-clk.h16 #define CLK_APMIXED_APLL1 4 macro
Dmt8183-clk.h20 #define CLK_APMIXED_APLL1 9 macro
Dmt6779-clk.h177 #define CLK_APMIXED_APLL1 12 macro
Dmt8186-clk.h276 #define CLK_APMIXED_APLL1 12 macro
Dmt8192-clk.h309 #define CLK_APMIXED_APLL1 8 macro
Dmediatek,mt8188-clk.h309 #define CLK_APMIXED_APLL1 9 macro

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