Home
last modified time | relevance | path

Searched full:clk0 (Results 1 – 25 of 30) sorted by relevance

12

/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgf100.c279 u32 clk0, clk1 = 0; in calc_clk() local
286 clk0 = calc_src(clk, idx, freq, &src0, &div0); in calc_clk()
287 clk0 = calc_div(clk, idx, clk0, freq, &div1D); in calc_clk()
290 if (clk0 != freq && (0x00004387 & (1 << idx))) { in calc_clk()
299 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
311 info->freq = clk0; in calc_clk()
Dgk104.c293 u32 clk0, clk1 = 0; in calc_clk() local
300 clk0 = calc_src(clk, idx, freq, &src0, &div0); in calc_clk()
301 clk0 = calc_div(clk, idx, clk0, freq, &div1D); in calc_clk()
304 if (clk0 != freq && (0x0000ff87 & (1 << idx))) { in calc_clk()
313 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
324 info->freq = clk0; in calc_clk()
Dmcp77.c184 u32 clk0 = src, clk1 = src; in calc_P() local
186 if (clk0 <= target) { in calc_P()
187 clk1 = clk0 << (*div ? 1 : 0); in calc_P()
190 clk0 >>= 1; in calc_P()
193 if (target - clk0 <= clk1 - target) in calc_P()
194 return clk0; in calc_P()
Dnv50.c347 u32 clk0 = src, clk1 = src; in calc_div() local
349 if (clk0 <= target) { in calc_div()
350 clk1 = clk0 << (*div ? 1 : 0); in calc_div()
353 clk0 >>= 1; in calc_div()
356 if (target - clk0 <= clk1 - target) in calc_div()
357 return clk0; in calc_div()
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dqcom,lpass-cpu.yaml149 - const: mi2s-bit-clk0
173 - const: mi2s-bit-clk0
271 "mi2s-bit-clk0", "mi2s-bit-clk1";
/linux-6.12.1/sound/soc/qcom/
Dlpass-apq8016.c273 "mi2s-osr-clk0",
279 "mi2s-bit-clk0",
Dlpass-sc7180.c296 "mi2s-bit-clk0",
/linux-6.12.1/drivers/clk/ti/
Dadpll.c266 char *name, struct clk *clk0, in ti_adpll_init_mux() argument
278 parents[0] = __clk_get_name(clk0); in ti_adpll_init_mux()
575 char *name, struct clk *clk0, in ti_adpll_init_clkout() argument
606 parent_names[0] = __clk_get_name(clk0); in ti_adpll_init_clkout()
/linux-6.12.1/arch/arm/boot/dts/st/
Dst-pincfg.h68 * CLK0, CLK1 modes with non-inverted clock
/linux-6.12.1/include/dt-bindings/clock/
Dintel,lgm-clk.h95 /* Gate CLK0 */
/linux-6.12.1/drivers/comedi/drivers/
Ddmm32at.c51 #define DMM32AT_AUX_DI0 BIT(0) /* J3.48 - CLK0 (SRC0) */
89 #define DMM32AT_CTRDIO_CFG_FREQ0 BIT(6) /* CLK0 1=10KHz 0=10MHz */
93 #define DMM32AT_CTRDIO_CFG_SRC0 BIT(1) /* CLK0 is 0=FREQ0 1=J3.48 */
/linux-6.12.1/drivers/clk/zynq/
Dclkc.c174 static void __init zynq_clk_register_periph_clk(enum zynq_clk clk0, in zynq_clk_register_periph_clk() argument
197 clks[clk0] = clk_register_gate(NULL, clk_name0, div_name, in zynq_clk_register_periph_clk()
209 clks[clk0] = ERR_PTR(-ENOMEM); in zynq_clk_register_periph_clk()
/linux-6.12.1/Documentation/devicetree/bindings/arm/
Dvexpress-config.yaml275 clk0 {
/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Dgpio-latch.yaml16 CLK0 ----------------------. ,--------.
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dsilabs,si5351.yaml223 * Overwrite CLK0 configuration with:
/linux-6.12.1/drivers/pinctrl/mvebu/
Dpinctrl-ac5.c205 MPP_FUNCTION(1, "ptp", "clk0"),
/linux-6.12.1/arch/arm64/boot/dts/actions/
Ds900-bubblegum-96.dts162 "[CLK0]", /* GPIO_68, HSEC pin 15 */
/linux-6.12.1/arch/arm/boot/dts/nxp/lpc/
Dlpc4350-hitex-eval.dts230 pins = "clk0", "clk1", "clk2", "clk3";
Dlpc4357-myd-lpc4357.dts184 pins = "clk0";
Dlpc4357-ea4357-devkit.dts260 pins = "clk0", "clk1", "clk2", "clk3";
/linux-6.12.1/drivers/gpio/
Dgpio-latch.c10 * CLK0 ----------------------. ,--------.
/linux-6.12.1/include/video/
Dsstfb.h242 * 8 freq registers (0-7) for video clock (CLK0)
/linux-6.12.1/drivers/pinctrl/sunxi/
Dpinctrl-suniv-f1c100s.c338 SUNXI_FUNCTION(0x2, "clk0"), /* OUT */
/linux-6.12.1/drivers/clk/
Dclk-si5351.c77 "clk0", "clk1", "clk2", "clk3", "clk4", "clk5", "clk6", "clk7"
820 /* clk0/clk4 can only connect to its own multisync */ in _si5351_clkout_reparent()
/linux-6.12.1/drivers/pinctrl/
Dpinctrl-lpc18xx.c416 LPC_N(clk0, 0xc00, EMC, CLKOUT, R, R, SDMMC, EMC_ALT, SSP1, ENET, 0, HS);
625 LPC18XX_PIN(clk0, PIN_CLK0),

12