| /linux-6.12.1/Documentation/devicetree/bindings/mmc/ |
| D | samsung,exynos-dw-mshc.yaml | 43 Handle to "biu" and "ciu" clocks for the
49 - const: ciu
51 samsung,dw-mshc-ciu-div:
56 The divider value for the card interface unit (ciu) clock.
61 - description: CIU clock phase shift value for tx mode
64 - description: CIU clock phase shift value for rx mode
68 The value of CUI clock phase shift value in transmit mode and CIU clock
75 - description: CIU clock phase shift value for tx mode
78 - description: CIU clock phase shift value for rx mode
82 The value of CIU TX and RX clock phase shift value for HS400 mode
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| D | rockchip-dw-mshc.yaml | 59 Handle to "biu" and "ciu" clocks for the bus interface unit clock and
60 the card interface unit clock. If "ciu-drive" and "ciu-sample" are
68 - const: ciu
69 - const: ciu-drive
70 - const: ciu-sample
72 Apart from the clock-names "biu" and "ciu" two more clocks
73 "ciu-drive" and "ciu-sample" are supported. They are used
74 to control the clock phases, "ciu-sample" is required for tuning
86 The default phase to set "ciu-sample" at probing,
120 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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| D | hisilicon,hi3798cv200-dw-mshc.yaml | 33 - const: ciu
35 - const: ciu-sample
36 - const: ciu-drive
84 clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
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| D | starfive,jh7110-mmc.yaml | 29 - description: ciu clock
34 - const: ciu
68 clock-names = "biu","ciu";
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| D | synopsys-dw-mshc-common.yaml | 25 Should be the frequency (in Hz) of the ciu clock. If this
26 is specified and the ciu clock is specified then we'll try to set the ciu
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| D | synopsys-dw-mshc.yaml | 30 Handle to "biu" and "ciu" clocks for the
36 - const: ciu
87 clock-names = "biu", "ciu";
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| D | k3-dw-mshc.txt | 36 clock-names = "ciu", "biu";
66 clock-names = "ciu", "biu";
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| /linux-6.12.1/Documentation/devicetree/bindings/mips/cavium/ |
| D | ciu.txt | 4 - compatible: "cavium,octeon-3860-ciu"
10 - reg: The base address of the CIU's register bank.
13 the CIU and may have a value of 0 or 1. The second cell is the bit
18 compatible = "cavium,octeon-3860-ciu";
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| D | ciu2.txt | 10 - reg: The base address of the CIU's register bank.
13 the CIU and may have a value between 0 and 63. The second cell is
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| D | cib.txt | 16 - interrupts: The CIU line to which the CIB block is connected.
31 interrupt-parent = <&ciu>;
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| /linux-6.12.1/drivers/mmc/host/ |
| D | dw_mmc-hi3798cv200.c | 129 priv->sample_clk = devm_clk_get(host->dev, "ciu-sample"); in dw_mci_hi3798cv200_init()
131 dev_err(host->dev, "failed to get ciu-sample clock\n"); in dw_mci_hi3798cv200_init()
135 priv->drive_clk = devm_clk_get(host->dev, "ciu-drive"); in dw_mci_hi3798cv200_init()
137 dev_err(host->dev, "failed to get ciu-drive clock\n"); in dw_mci_hi3798cv200_init()
143 dev_err(host->dev, "failed to enable ciu-sample clock\n"); in dw_mci_hi3798cv200_init()
149 dev_err(host->dev, "failed to enable ciu-drive clock\n"); in dw_mci_hi3798cv200_init()
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| D | dw_mmc-hi3798mv200.c | 192 priv->sample_clk = devm_clk_get_enabled(host->dev, "ciu-sample"); in dw_mci_hi3798mv200_init()
195 "failed to get enabled ciu-sample clock\n"); in dw_mci_hi3798mv200_init()
197 priv->drive_clk = devm_clk_get_enabled(host->dev, "ciu-drive"); in dw_mci_hi3798mv200_init()
200 "failed to get enabled ciu-drive clock\n"); in dw_mci_hi3798mv200_init()
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| /linux-6.12.1/arch/mips/cavium-octeon/ |
| D | octeon-irq.c | 76 struct { /* only used for ciu/ciu2 */
83 int ciu_node; /* NUMA node number of the CIU */
804 * For non-v2 CIU, we will allow only single CPU affinity. in octeon_irq_ciu_set_affinity()
937 * Newer octeon chips have support for lockless CIU operation.
940 .name = "CIU",
952 .name = "CIU",
965 * Newer octeon chips have support for lockless CIU operation.
968 .name = "CIU",
980 .name = "CIU",
993 .name = "CIU",
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| D | Kconfig | 84 tristate "Module to measure interrupt latency using Octeon CIU Timer"
87 the CIU Timers on Octeon.
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | altr_socfpga.txt | 27 the SDMMC CIU clock. The first value is the clk_sample(smpsel), and the second
29 hold/delay times that is needed for the SD/MMC CIU clock. The values of both
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| /linux-6.12.1/arch/arm/boot/dts/rockchip/ |
| D | rv1126.dtsi | 665 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
678 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
690 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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| D | rv1108.dtsi | 468 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
480 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
492 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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| D | rk3036.dtsi | 255 clock-names = "biu", "ciu";
269 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
287 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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| D | rk322x.dtsi | 762 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
775 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
790 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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| D | rk3128.dtsi | 467 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
483 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
499 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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| /linux-6.12.1/arch/arm/boot/dts/samsung/ |
| D | exynos5260-xyref5260.dts | 98 samsung,dw-mshc-ciu-div = <3>;
110 samsung,dw-mshc-ciu-div = <3>;
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| D | exynos5410-smdk5410.dts | 70 samsung,dw-mshc-ciu-div = <3>;
80 samsung,dw-mshc-ciu-div = <3>;
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| /linux-6.12.1/arch/mips/boot/dts/cavium-octeon/ |
| D | octeon_3xxx.dtsi | 10 interrupt-parent = <&ciu>;
18 ciu: interrupt-controller@1070000000000 { label
19 compatible = "cavium,octeon-3860-ciu";
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| /linux-6.12.1/arch/arc/boot/dts/ |
| D | hsdk.dts | 154 mmcclk_ciu: mmcclk-ciu {
157 * DW sdio controller has external ciu clock divider
259 clock-names = "biu", "ciu";
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| /linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 188 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
202 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
216 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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