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/linux-6.12.1/arch/arm/boot/dts/aspeed/
Dibm-power10-quad.dtsi13 cfam@0,0 {
41 cfam@0,0 {
69 cfam@0,0 {
97 cfam@0,0 {
125 cfam@0,0 {
153 cfam@0,0 {
181 cfam@0,0 {
209 cfam@0,0 {
237 cfam@0,0 {
265 cfam@0,0 {
[all …]
Dibm-power11-quad.dtsi129 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
131 cfam@0,0 {
159 cfam@0,0 {
189 cfam@0,0 {
219 cfam@0,0 {
249 cfam@0,0 {
279 cfam@0,0 {
309 cfam@0,0 {
339 cfam@0,0 {
369 cfam@0,0 {
[all …]
Daspeed-bmc-ibm-fuji.dts2469 cfam@4,0 { /* DCM2_C0 */
2497 cfam@0,0 {
2527 cfam@0,0 {
2557 cfam@0,0 {
2587 cfam@0,0 {
2617 cfam@0,0 {
2647 cfam@0,0 {
2677 cfam@0,0 {
2707 cfam@0,0 {
2821 cfam@5,0 { /* DCM2_C1 */
[all …]
Daspeed-bmc-ibm-everest.dts2503 cfam@4,0 { /* DCM2_C0 */
2531 cfam@0,0 {
2563 cfam@0,0 {
2595 cfam@0,0 {
2627 cfam@0,0 {
2659 cfam@0,0 {
2691 cfam@0,0 {
2723 cfam@0,0 {
2755 cfam@0,0 {
2876 cfam@5,0 { /* DCM2_C1 */
[all …]
Dibm-power9-dual.dtsi5 cfam@0,0 {
106 cfam@1,0 {
Dibm-power10-dual.dtsi10 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
12 cfam@0,0 {
179 cfam@1,0 {
Daspeed-bmc-opp-tacoma.dts128 /*Q0-Q7*/ "cfam-reset","","","","","","","fsi-routing",
199 cfam@0,0 {
300 cfam@1,0 {
Daspeed-bmc-opp-palmetto.dts354 cfam@0,0 {
Daspeed-bmc-opp-nicole.dts219 /*A0-A7*/ "","cfam-reset","","","","","fsi-mux","",
/linux-6.12.1/Documentation/devicetree/bindings/fsi/
Dibm,p9-fsi-controller.yaml14 located on a CFAM. Therefore this node will always be a child of an FSI CFAM
39 cfam@0,0 {
Daspeed,ast2600-fsi-master.yaml25 cfam-reset-gpios:
28 Output GPIO pin for CFAM reset
94 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
96 cfam@0,0 {
Dibm,p9-sbefifo.yaml13 The SBEFIFO is an FSI CFAM engine that provides an interface to the
15 of an FSI CFAM node.
Dibm,i2cr-fsi-master.yaml13 The I2C Responder (I2CR) is a an I2C device that's connected to an FSI CFAM
14 (see fsi.txt). The I2CR translates I2C bus operations to FSI CFAM reads and
Dibm,fsi2spi.yaml13 This binding describes an FSI CFAM engine called the FSI2SPI. Therefore this
14 node will always be a child of an FSI CFAM node. This FSI2SPI engine provides
Dfsi-controller.yaml14 FSI bus is connected to a CFAM (Common FRU Access Macro) which contains
39 "cfam@[0-9a-f],[0-9a-f]":
Dfsi.txt74 cfam@1,2 {
127 /* A FSI slave (aka. CFAM) at link 0, ID 0. */
128 cfam@0,0 {
Dibm,p9-scom.yaml14 Interconnect Bus). This node will always be a child of an FSI CFAM node.
/linux-6.12.1/Documentation/devicetree/bindings/i2c/
Dibm,i2c-fsi.yaml13 This I2C controller is an FSI CFAM engine, providing access to a number of
14 I2C busses. Therefore this node will always be a child of an FSI CFAM node.
/linux-6.12.1/drivers/fsi/
DKconfig69 This option enables a virtual FSI master in order to access a CFAM
71 that translates I2C commands to CFAM or SCOM operations, effectively
Dfsi-master-i2cr.c199 * The I2CR doesn't have CFAM or FSI slave address space - only the in i2cr_read()
201 * emulate at minimum the CFAM config table so that the appropriate in i2cr_read()
236 /* I2CR writes to CFAM or FSI slave address are a successful no-op. */ in i2cr_write()
Dfsi-core.c10 * - s/cfam/chip (cfam_id -> chip_id etc...)
870 return kasprintf(GFP_KERNEL, "fsi/cfam%d", slave->cdev_idx); in cfam_devnode()
872 return kasprintf(GFP_KERNEL, "cfam%d", slave->cdev_idx); in cfam_devnode()
877 .name = "cfam",
943 "cfam",
1006 dev_warn(&master->dev, "slave %02x:%02x invalid cfam id CRC!\n", in fsi_slave_init()
Dfsi-master.h85 #define FSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam */
Dfsi-master-aspeed.c473 gpio = devm_gpiod_get_optional(dev, "cfam-reset", GPIOD_OUT_LOW); in setup_cfam_reset()
575 dev_err(&pdev->dev, "CFAM reset GPIO setup failed\n"); in fsi_master_aspeed_probe()
/linux-6.12.1/include/trace/events/
Dfsi.h177 TP_printk("fsi%d: idx:%d link:%d/%d cid:%d cfam:%08x %08x",
203 TP_printk("fsi%d: cfam:%08x link:%d/%d",
/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-bus-fsi45 Provides a means of resetting the cfam that is attached to the

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