| /linux-6.12.1/drivers/bus/ |
| D | uniphier-system-bus.c | 15 #define UNIPHIER_SBC_BASE 0x100 /* base address of bank0 space */
17 #define UNIPHIER_SBC_CTRL0 0x200 /* timing parameter 0 of bank0 */
18 #define UNIPHIER_SBC_CTRL1 0x204 /* timing parameter 1 of bank0 */
19 #define UNIPHIER_SBC_CTRL2 0x208 /* timing parameter 2 of bank0 */
20 #define UNIPHIER_SBC_CTRL3 0x20c /* timing parameter 3 of bank0 */
21 #define UNIPHIER_SBC_CTRL4 0x300 /* timing parameter 4 of bank0 */
127 * swapped. In this case, bank0 and bank1 should be swapped as well. in uniphier_system_bus_check_boot_swap()
|
| /linux-6.12.1/arch/sh/kernel/cpu/sh3/ |
| D | swsusp.S | 59 ! BL=0: R7->R0 is bank0
80 ! BL=0: R7->R0 is bank0
105 ! BL=0: R7->R0 is bank0
116 jsr @k1 ! switch to bank0 and save all regs
119 ! BL=0: R7->R0 is bank0
|
| /linux-6.12.1/drivers/leds/ |
| D | leds-tca6507.c | 18 * are named MASTER, BANK0 and BANK1.
24 * align with the two levels BANK0 and BANK1. This driver does not
62 * Each bank (BANK0 and BANK1) has two usage counts - LEDs using the
86 #define TCA6507_LS_LED_PWM0 0x2 /* Output LOW with Bank0 rate */
90 #define TCA6507_LS_BLINK0 0x6 /* Blink at Bank0 rate */
100 BANK0, enumerator
298 case BANK0: in set_level()
407 for (i = MASTER; i >= BANK0; i--) { in led_prepare()
447 for (i = BANK0; i <= BANK1; i++) { in led_prepare()
|
| /linux-6.12.1/Documentation/devicetree/bindings/gpio/ |
| D | rockchip,gpio-bank.yaml | 16 - rockchip,rk3188-gpio-bank0
72 compatible = "rockchip,rk3188-gpio-bank0";
|
| /linux-6.12.1/arch/sh/kernel/ |
| D | relocate_kernel.S | 57 /* switch to bank0 and save r7->r0 */
89 /* make sure bank0 is active and restore r0->r7 */
118 /* switch back to bank0 */
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/ivytown/ |
| D | uncore-memory.json | 545 "EventName": "UNC_M_RD_CAS_RANK0.BANK0",
617 "EventName": "UNC_M_RD_CAS_RANK1.BANK0",
689 "EventName": "UNC_M_RD_CAS_RANK2.BANK0",
761 "EventName": "UNC_M_RD_CAS_RANK3.BANK0",
833 "EventName": "UNC_M_RD_CAS_RANK4.BANK0",
905 "EventName": "UNC_M_RD_CAS_RANK5.BANK0",
977 "EventName": "UNC_M_RD_CAS_RANK6.BANK0",
1049 "EventName": "UNC_M_RD_CAS_RANK7.BANK0",
1245 "EventName": "UNC_M_WR_CAS_RANK0.BANK0",
1317 "EventName": "UNC_M_WR_CAS_RANK1.BANK0",
[all …]
|
| /linux-6.12.1/drivers/soundwire/ |
| D | debugfs.c | 74 ret += scnprintf(buf + ret, RD_BUF - ret, "Bank0\n"); in sdw_slave_reg_show()
116 /* DPi Bank0 registers */ in sdw_slave_reg_show()
117 ret += scnprintf(buf + ret, RD_BUF - ret, "Bank0\n"); in sdw_slave_reg_show()
|
| /linux-6.12.1/drivers/iommu/ |
| D | mtk_iommu.c | 377 /* Tlb flush all always is in bank0. */ in mtk_iommu_tlb_flush_all()
1038 const struct mtk_iommu_bank_data *bank0 = &data->bank[0]; in mtk_iommu_hw_init() local
1042 * Global control settings are in bank0. May re-init these global registers in mtk_iommu_hw_init()
1043 * since no sure if there is bank0 consumers. in mtk_iommu_hw_init()
1049 regval = readl_relaxed(bank0->base + REG_MMU_CTRL_REG); in mtk_iommu_hw_init()
1052 writel_relaxed(regval, bank0->base + REG_MMU_CTRL_REG); in mtk_iommu_hw_init()
1061 writel_relaxed(regval, bank0->base + REG_MMU_VLD_PA_RNG); in mtk_iommu_hw_init()
1064 writel_relaxed(F_MMU_DCM, bank0->base + REG_MMU_DCM_DIS); in mtk_iommu_hw_init()
1066 writel_relaxed(0, bank0->base + REG_MMU_DCM_DIS); in mtk_iommu_hw_init()
1070 regval = readl_relaxed(bank0->base + REG_MMU_WR_LEN_CTRL); in mtk_iommu_hw_init()
[all …]
|
| /linux-6.12.1/Documentation/admin-guide/gpio/ |
| D | gpio-sim.rst | 96 bank0 {
100 gpio-sim,label = "dt-bank0";
|
| /linux-6.12.1/arch/arm64/boot/dts/freescale/ |
| D | imx8mp-msc-sm2s-14N0600E.dtsi | 12 reg = <0x0 0x40000000 0 0x80000000>; /* bank0, 2GiB */
|
| /linux-6.12.1/arch/sh/kernel/cpu/shmobile/ |
| D | sleep.S | 62 /* make sure bank0 is selected, save low registers */
347 /* switch to bank0, restore low registers */
|
| /linux-6.12.1/drivers/iio/adc/ |
| D | cpcap-adc.c | 128 /* Bank0 channels */
148 /* Remuxed channels using bank0 entries */
221 /* Bank0 */
247 /* Bank0 */
357 /* Bank0 */
|
| /linux-6.12.1/drivers/video/fbdev/ |
| D | platinumfb.c | 533 int bank0, bank1, bank2, bank3, rc; in platinumfb_probe() local
595 bank0 = 1; /* builtin 1MB vram, always there */ in platinumfb_probe()
599 pinfo->total_vram = (bank0 + bank1 + bank2 + bank3) * 0x100000; in platinumfb_probe()
602 bank3, bank2, bank1, bank0); in platinumfb_probe()
|
| /linux-6.12.1/tools/testing/selftests/gpio/ |
| D | gpio-sim.sh | 304 create_bank chip bank0
305 set_label chip bank0 foobar
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | uncore-memory.json | 656 "EventName": "UNC_M_RD_CAS_RANK0.BANK0",
865 "EventName": "UNC_M_RD_CAS_RANK1.BANK0",
1074 "EventName": "UNC_M_RD_CAS_RANK2.BANK0",
1283 "EventName": "UNC_M_RD_CAS_RANK3.BANK0",
1492 "EventName": "UNC_M_RD_CAS_RANK4.BANK0",
1701 "EventName": "UNC_M_RD_CAS_RANK5.BANK0",
1910 "EventName": "UNC_M_RD_CAS_RANK6.BANK0",
2119 "EventName": "UNC_M_RD_CAS_RANK7.BANK0",
2463 "EventName": "UNC_M_WR_CAS_RANK0.BANK0",
2672 "EventName": "UNC_M_WR_CAS_RANK1.BANK0",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/haswellx/ |
| D | uncore-memory.json | 585 "EventName": "UNC_M_RD_CAS_RANK0.BANK0",
794 "EventName": "UNC_M_RD_CAS_RANK1.BANK0",
993 "EventName": "UNC_M_RD_CAS_RANK2.BANK0",
1012 "EventName": "UNC_M_RD_CAS_RANK4.BANK0",
1221 "EventName": "UNC_M_RD_CAS_RANK5.BANK0",
1430 "EventName": "UNC_M_RD_CAS_RANK6.BANK0",
1639 "EventName": "UNC_M_RD_CAS_RANK7.BANK0",
1963 "EventName": "UNC_M_WR_CAS_RANK0.BANK0",
2172 "EventName": "UNC_M_WR_CAS_RANK1.BANK0",
2381 "EventName": "UNC_M_WR_CAS_RANK4.BANK0",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | uncore-memory.json | 593 "EventName": "UNC_M_RD_CAS_RANK0.BANK0",
802 "EventName": "UNC_M_RD_CAS_RANK1.BANK0",
1001 "EventName": "UNC_M_RD_CAS_RANK2.BANK0",
1020 "EventName": "UNC_M_RD_CAS_RANK4.BANK0",
1229 "EventName": "UNC_M_RD_CAS_RANK5.BANK0",
1438 "EventName": "UNC_M_RD_CAS_RANK6.BANK0",
1647 "EventName": "UNC_M_RD_CAS_RANK7.BANK0",
1971 "EventName": "UNC_M_WR_CAS_RANK0.BANK0",
2180 "EventName": "UNC_M_WR_CAS_RANK1.BANK0",
2389 "EventName": "UNC_M_WR_CAS_RANK4.BANK0",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | uncore-memory.json | 556 "EventName": "UNC_M_RD_CAS_RANK0.BANK0",
765 "EventName": "UNC_M_RD_CAS_RANK1.BANK0",
964 "EventName": "UNC_M_RD_CAS_RANK2.BANK0",
983 "EventName": "UNC_M_RD_CAS_RANK4.BANK0",
1192 "EventName": "UNC_M_RD_CAS_RANK5.BANK0",
1401 "EventName": "UNC_M_RD_CAS_RANK6.BANK0",
1610 "EventName": "UNC_M_RD_CAS_RANK7.BANK0",
1934 "EventName": "UNC_M_WR_CAS_RANK0.BANK0",
2143 "EventName": "UNC_M_WR_CAS_RANK1.BANK0",
2352 "EventName": "UNC_M_WR_CAS_RANK4.BANK0",
[all …]
|
| /linux-6.12.1/arch/mips/include/asm/mach-rc32434/ |
| D | ddr.h | 56 /* DDR bank0 registers */
|
| /linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ |
| D | exynos-srom.yaml | 107 ranges = <0 0 0x04000000 0x20000 // Bank0
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | uncore-memory.json | 1032 "EventName": "UNC_M_RD_CAS_RANK0.BANK0",
1241 "EventName": "UNC_M_RD_CAS_RANK1.BANK0",
1450 "EventName": "UNC_M_RD_CAS_RANK2.BANK0",
1659 "EventName": "UNC_M_RD_CAS_RANK3.BANK0",
1868 "EventName": "UNC_M_RD_CAS_RANK4.BANK0",
2077 "EventName": "UNC_M_RD_CAS_RANK5.BANK0",
2286 "EventName": "UNC_M_RD_CAS_RANK6.BANK0",
2495 "EventName": "UNC_M_RD_CAS_RANK7.BANK0",
3427 "EventName": "UNC_M_WR_CAS_RANK0.BANK0",
3636 "EventName": "UNC_M_WR_CAS_RANK1.BANK0",
[all …]
|
| /linux-6.12.1/arch/arm/boot/dts/ti/omap/ |
| D | am43x-epos-evm.dts | 66 row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */
67 &gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */
68 &gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */
69 &gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */
|
| /linux-6.12.1/Documentation/devicetree/bindings/display/ |
| D | solomon,ssd1307fb.yaml | 106 8 bit value array of current drive pulse widths for BANK0, and colors A,
|
| /linux-6.12.1/drivers/staging/fbtft/ |
| D | fb_sh1106.c | 102 /* Set Contrast Control for BANK0 */ in set_gamma()
|
| /linux-6.12.1/include/linux/rtc/ |
| D | ds1685.h | 333 * - 64 additional bytes are available in Bank0.
343 #define NVRAM_BANK0_BASE 0x40 /* NVRAM Addr in Bank0 regs */
|