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/linux-6.12.1/arch/riscv/kvm/
Daia_aplic.c10 #include <linux/irqchip/riscv-aplic.h>
29 struct aplic { struct
40 static u32 aplic_read_sourcecfg(struct aplic *aplic, u32 irq) in aplic_read_sourcecfg() argument
46 if (!irq || aplic->nr_irqs <= irq) in aplic_read_sourcecfg()
48 irqd = &aplic->irqs[irq]; in aplic_read_sourcecfg()
57 static void aplic_write_sourcecfg(struct aplic *aplic, u32 irq, u32 val) in aplic_write_sourcecfg() argument
62 if (!irq || aplic->nr_irqs <= irq) in aplic_write_sourcecfg()
64 irqd = &aplic->irqs[irq]; in aplic_write_sourcecfg()
76 static u32 aplic_read_target(struct aplic *aplic, u32 irq) in aplic_read_target() argument
82 if (!irq || aplic->nr_irqs <= irq) in aplic_read_target()
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Daia_device.c273 /* APLIC base is required for non-zero number of sources */ in aia_init()
277 /* Initialize APLIC */ in aia_init()
636 /* Inject interrupt level change in APLIC */ in kvm_riscv_aia_inject_irq()
672 /* Cleanup APLIC context */ in kvm_riscv_aia_destroy_vm()
/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Driscv,aplic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml#
7 title: RISC-V Advanced Platform Level Interrupt Controller (APLIC)
14 platform level interrupt controller (APLIC) for handling wired interrupts
18 The RISC-V APLIC is implemented as hierarchical APLIC domains where all
19 interrupt sources connect to the root APLIC domain and a parent APLIC
20 domain can delegate interrupt sources to it's child APLIC domains. There
21 is one device tree node for each APLIC domain.
30 - qemu,aplic
31 - const: riscv,aplic
45 Given APLIC domain directly injects external interrupts to a set of
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/linux-6.12.1/drivers/irqchip/
Dirq-riscv-aplic-main.c9 #include <linux/irqchip/riscv-aplic.h>
17 #include "irq-riscv-aplic-main.h"
101 /* Setup APLIC domaincfg register */ in aplic_init_hw_global()
126 /* Clear APLIC domaincfg */ in aplic_init_hw_irqs()
161 * APLIC IDCs which forces the APLIC driver to use MSI mode. in aplic_setup_priv()
176 /* Setup initial state APLIC interrupts */ in aplic_setup_priv()
197 * If msi-parent property is present then setup APLIC MSI in aplic_probe()
198 * mode otherwise setup APLIC direct mode. in aplic_probe()
210 dev_err(dev, "failed to setup APLIC in %s mode\n", msi_mode ? "MSI" : "direct"); in aplic_probe()
221 { .compatible = "riscv,aplic" },
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Dirq-riscv-aplic-msi.c12 #include <linux/irqchip/riscv-aplic.h>
21 #include "irq-riscv-aplic-main.h"
47 * APLIC’s source identity number for the interrupt to the domain’s in aplic_msi_irq_retrigger_level()
61 * when APLIC is in MSI mode. in aplic_msi_irq_eoi()
74 * requires interrupt retriggering when APLIC is in MSI mode. in aplic_msi_irq_set_type()
148 .name = "APLIC-MSI",
190 dev_err(dev, "failed to create APLIC context\n"); in aplic_msi_setup()
196 * The APLIC outgoing MSI config registers assume target MSI in aplic_msi_setup()
208 dev_err(dev, "IMSIC guest index bits big for APLIC LHXS\n"); in aplic_msi_setup()
215 dev_err(dev, "IMSIC hart index bits big for APLIC LHXW\n"); in aplic_msi_setup()
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Dirq-riscv-aplic-direct.c14 #include <linux/irqchip/riscv-aplic.h>
20 #include "irq-riscv-aplic-main.h"
81 .name = "APLIC-DIRECT",
132 * To handle an APLIC direct interrupts, we just read the CLAIMI register
239 dev_err(dev, "failed to create APLIC context\n"); in aplic_direct_setup()
275 * Boot cpu might not have APLIC hart_index = 0 so check in aplic_direct_setup()
303 "irqchip/riscv/aplic:starting", in aplic_direct_setup()
316 /* Create irq domain instance for the APLIC */ in aplic_direct_setup()
DMakefile99 obj-$(CONFIG_RISCV_APLIC) += irq-riscv-aplic-main.o irq-riscv-aplic-direct.o
100 obj-$(CONFIG_RISCV_APLIC_MSI) += irq-riscv-aplic-msi.o
Dirq-riscv-intc.c98 * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement in riscv_intc_irq_eoi()
231 * interrupt controllers (such as PLIC, IMSIC and APLIC in riscv_intc_init()
Dirq-riscv-imsic-state.c544 * If not specified assumed the default APLIC-IMSIC configuration. in imsic_populate_global_dt()
/linux-6.12.1/drivers/acpi/riscv/
Dirq.c41 * interrupt controller structures and IMSIC before APLIC. The interrupt
43 * the incremental order like RINTC(24)->IMSIC(25)->APLIC(26)->PLIC(27).
161 struct acpi_madt_aplic *aplic = (struct acpi_madt_aplic *)header; in riscv_acpi_aplic_parse_madt() local
163 return riscv_acpi_register_ext_intc(aplic->gsi_base, aplic->num_sources, aplic->num_idcs, in riscv_acpi_aplic_parse_madt()
164 aplic->id, ACPI_RISCV_IRQCHIP_APLIC); in riscv_acpi_aplic_parse_madt()
178 /* There can be either PLIC or APLIC */ in riscv_acpi_init_gsi_mapping()
/linux-6.12.1/arch/riscv/include/asm/
Dkvm_aia.h45 /* Guest physical address of APLIC */
48 /* Internal state of APLIC */
/linux-6.12.1/arch/riscv/include/uapi/asm/
Dkvm.h340 * APLIC register (range 0x0000-0x3FFF) and it must be 4-byte aligned.
/linux-6.12.1/drivers/acpi/
Dscan.c862 "RSCV0002", /* RISC-V APLIC */
/linux-6.12.1/include/acpi/
Dactbl2.h1392 /* 26: RISC-V APLIC */
/linux-6.12.1/
DMAINTAINERS19819 F: Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
19821 F: drivers/irqchip/irq-riscv-aplic-*.c
19822 F: drivers/irqchip/irq-riscv-aplic-*.h
19826 F: include/linux/irqchip/riscv-aplic.h