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/linux-6.12.1/include/media/i2c/
Dadv7183.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * adv7183.h - definition for adv7183 inputs and outputs
13 #define ADV7183_COMPOSITE1 1 /* CVBS in on AIN2 */
14 #define ADV7183_COMPOSITE2 2 /* CVBS in on AIN3 */
25 #define ADV7183_SVIDEO1 12 /* Y on AIN2, C on AIN5 */
26 #define ADV7183_SVIDEO2 13 /* Y on AIN3, C on AIN6 */
29 #define ADV7183_COMPONENT1 15 /* Y on AIN2, Pr on AIN3, Pb on AIN6 */
/linux-6.12.1/Documentation/hwmon/
Dpcf8591.rst17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
33 Pins AIN0 to AIN3 are single ended inputs for channels 0 to 3
35 - mode 1 : three differential inputs
36 Pins AIN3 is the common negative differential input
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dti,ads1015.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Baluta <daniel.baluta@nxp.com>
19 - ti,ads1015
20 - ti,ads1115
21 - ti,tla2021
22 - ti,tla2024
30 "#address-cells":
33 "#size-cells":
[all …]
Dti,ads1119.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com>
13 The TI ADS1119 is a precision 16-bit ADC over I2C that offers single-ended and
28 reset-gpios:
31 avdd-supply: true
32 dvdd-supply: true
34 vref-supply:
38 "#address-cells":
[all …]
/linux-6.12.1/sound/soc/codecs/
Dwm8776.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8776.c -- WM8776 ALSA SoC Audio driver
5 * Copyright 2009-12 Wolfson Microelectronics plc
83 static const DECLARE_TLV_DB_SCALE(hp_tlv, -12100, 100, 1);
84 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
85 static const DECLARE_TLV_DB_SCALE(adc_tlv, -10350, 50, 1);
105 SOC_DAPM_SINGLE("AIN2 Switch", WM8776_ADCMUX, 1, 1, 0),
106 SOC_DAPM_SINGLE("AIN3 Switch", WM8776_ADCMUX, 2, 1, 0),
121 SND_SOC_DAPM_INPUT("AIN2"),
122 SND_SOC_DAPM_INPUT("AIN3"),
[all …]
Dwm8770.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8770.c -- WM8770 ALSA SoC Audio driver
105 regcache_mark_dirty(wm8770->regmap); \
114 static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0);
115 static const DECLARE_TLV_DB_SCALE(dac_dig_tlv, -12750, 50, 1);
116 static const DECLARE_TLV_DB_SCALE(dac_alg_tlv, -12700, 100, 1);
192 "AIN1", "AIN2", "AIN3", "AIN4",
231 SND_SOC_DAPM_INPUT("AIN2"),
232 SND_SOC_DAPM_INPUT("AIN3"),
270 { "Capture Mux", "AIN2", "AIN2" },
[all …]
Dak5558.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <sound/soc-dapm.h>
78 "Sharp Roll-Off", "Slow Roll-Off",
79 "Short Delay Sharp Roll-Off", "Short Delay Slow Roll-Off",
100 SND_SOC_DAPM_INPUT("AIN2"),
101 SND_SOC_DAPM_INPUT("AIN3"),
123 SND_SOC_DAPM_INPUT("AIN2"),
135 {"ADC Ch2", NULL, "AIN2"},
138 {"ADC Ch3", NULL, "AIN3"},
161 {"ADC Ch2", NULL, "AIN2"},
[all …]
Dmt6351.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6351.c -- mt6351 ALSA SoC audio codec driver
8 #include <linux/dma-mapping.h>
202 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
204 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
225 dev_warn(cmpnt->dev, "%s(), error rate %d, return 3", in get_cap_reg_val()
256 dev_warn(cmpnt->dev, "%s(), error rate %d, return 8", in get_play_reg_val()
266 struct snd_soc_component *cmpnt = dai->component; in mt6351_codec_dai_hw_params()
270 dev_dbg(priv->dev, "%s(), substream->stream %d, rate %d\n", in mt6351_codec_dai_hw_params()
271 __func__, substream->stream, rate); in mt6351_codec_dai_hw_params()
[all …]
Dmt6359.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6359.c -- mt6359 ALSA SoC audio codec driver
24 regmap_update_bits(priv->regmap, MT6359_SMT_CON1, 0x3ff0, 0x3ff0); in mt6359_set_gpio_smt()
30 regmap_update_bits(priv->regmap, MT6359_DRV_CON2, 0xffff, 0x8888); in mt6359_set_gpio_driving()
31 regmap_update_bits(priv->regmap, MT6359_DRV_CON3, 0xffff, 0x8888); in mt6359_set_gpio_driving()
32 regmap_update_bits(priv->regmap, MT6359_DRV_CON4, 0x00ff, 0x88); in mt6359_set_gpio_driving()
38 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ffe); in mt6359_set_playback_gpio()
39 regmap_write(priv->regmap, MT6359_GPIO_MODE2_SET, 0x0249); in mt6359_set_playback_gpio()
42 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x6); in mt6359_set_playback_gpio()
43 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x1); in mt6359_set_playback_gpio()
[all …]
Dcs42xx8.h2 * cs42xx8.h - Cirrus Logic CS42448/CS42888 Audio CODEC driver header file
45 #define CS42XX8_VOLAIN2 0x12 /* Volume Control AIN2 */
46 #define CS42XX8_VOLAIN3 0x13 /* Volume Control AIN3 */
58 #define CS42XX8_NUMREGS (CS42XX8_LASTREG - CS42XX8_FIRSTREG + 1)
94 #define CS42XX8_FUNCMOD_DAC_FM_MASK (((1 << CS42XX8_FUNCMOD_DAC_FM_WIDTH) - 1) << CS42XX8_FUNCMOD_…
98 #define CS42XX8_FUNCMOD_ADC_FM_MASK (((1 << CS42XX8_FUNCMOD_ADC_FM_WIDTH) - 1) << CS42XX8_FUNCMOD_…
104 #define CS42XX8_FUNCMOD_MFREQ_MASK (((1 << CS42XX8_FUNCMOD_MFREQ_WIDTH) - 1) << CS42XX8_FUNCMOD_MF…
125 #define CS42XX8_INTF_DAC_DIF_MASK (((1 << CS42XX8_INTF_DAC_DIF_WIDTH) - 1) << CS42XX8_INTF_DAC_DIF…
135 #define CS42XX8_INTF_ADC_DIF_MASK (((1 << CS42XX8_INTF_ADC_DIF_WIDTH) - 1) << CS42XX8_INTF_ADC_DIF…
144 /* ADC Control & DAC De-Emphasis (Address 05h) */
[all …]
Dadau1977.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
26 #include <dt-bindings/sound/adi,adau1977.h>
157 static const DECLARE_TLV_DB_MINMAX_MUTE(adau1977_adc_gain, -3562, 6000);
174 SND_SOC_DAPM_INPUT("AIN2"),
175 SND_SOC_DAPM_INPUT("AIN3"),
183 { "ADC2", NULL, "AIN2" },
184 { "ADC3", NULL, "AIN3" },
197 ADAU1977_REG_POST_ADC_GAIN((x) - 1), \
201 SOC_SINGLE("ADC" #x " Highpass-Filter Capture Switch", \
[all …]
Dcs4234.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // cs4234.c -- ALSA SoC CS4234 driver
44 /* -89.92dB to +6.02dB with step of 0.38dB */
45 static const DECLARE_TLV_DB_SCALE(dac_tlv, -8992, 38, 0);
96 regmap_read(cs4234->regmap, CS4234_ADC_CTRL2, &val); in cs4234_dac14_grp_delay_put()
98 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
99 dev_err(component->dev, "Can't change group delay while ADC are ON\n"); in cs4234_dac14_grp_delay_put()
103 regmap_read(cs4234->regmap, CS4234_DAC_CTRL4, &val); in cs4234_dac14_grp_delay_put()
105 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
106 dev_err(component->dev, "Can't change group delay while DAC are ON\n"); in cs4234_dac14_grp_delay_put()
[all …]
Dadau1372.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
24 #include "adau-utils.h"
125 static const DECLARE_TLV_DB_MINMAX(adau1372_digital_tlv, -9563, 0);
126 static const DECLARE_TLV_DB_SCALE(adau1372_pga_tlv, -1200, 75, 0);
189 SOC_ENUM("ADC 0+1 High-Pass-Filter", adau1372_hpf0_1_enum),
190 SOC_ENUM("ADC 2+3 High-Pass-Filter", adau1372_hpf2_3_enum),
363 SND_SOC_DAPM_INPUT("AIN2"),
364 SND_SOC_DAPM_INPUT("AIN3"),
484 { "PGA2", NULL, "AIN2" },
[all …]
Dcs42xx8.c52 /* -127.5dB to 0dB with step of 0.5dB */
53 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
54 /* -64dB to 24dB with step of 0.5dB */
55 static const DECLARE_TLV_DB_SCALE(adc_tlv, -6400, 50, 0);
57 static const char *const cs42xx8_adc_single[] = { "Differential", "Single-Ended" };
82 CS42XX8_VOLAIN2, 0, -0x80, 0x30, 7, 0, adc_tlv),
84 CS42XX8_VOLAIN4, 0, -0x80, 0x30, 7, 0, adc_tlv),
91 SOC_SINGLE("ADC High-Pass Filter Switch", CS42XX8_ADCCTL, 7, 1, 1),
92 SOC_SINGLE("DAC De-emphasis Switch", CS42XX8_ADCCTL, 5, 1, 0),
105 CS42XX8_VOLAIN6, 0, -0x80, 0x30, 7, 0, adc_tlv),
[all …]
/linux-6.12.1/include/linux/platform_data/
Dad7793.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 * enum ad7793_clock_source - AD7793 clock source selection
25 * enum ad7793_bias_voltage - AD7793 bias voltage selection
27 * @AD7793_BIAS_VOLTAGE_AIN1: Bias voltage connected to AIN1(-).
28 * @AD7793_BIAS_VOLTAGE_AIN2: Bias voltage connected to AIN2(-).
29 * @AD7793_BIAS_VOLTAGE_AIN3: Bias voltage connected to AIN3(-).
40 * enum ad7793_refsel - AD7793 reference voltage selection
42 * and REFIN1(-).
44 * and REFIN1(-). Only valid for AD7795/AD7796.
54 * enum ad7793_current_source_direction - AD7793 excitation current direction
[all …]
/linux-6.12.1/drivers/iio/adc/
Dad7192.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright 2011-2015 Analog Devices Inc.
11 #include <linux/clk-provider.h>
35 #define AD7192_REG_COMM 0 /* Communications Register (WO, 8-bit) */
36 #define AD7192_REG_STAT 0 /* Status Register (RO, 8-bit) */
37 #define AD7192_REG_MODE 1 /* Mode Register (RW, 24-bit */
38 #define AD7192_REG_CONF 2 /* Configuration Register (RW, 24-bit) */
39 #define AD7192_REG_DATA 3 /* Data Register (RO, 24/32-bit) */
40 #define AD7192_REG_ID 4 /* ID Register (RO, 8-bit) */
41 #define AD7192_REG_GPOCON 5 /* GPOCON Register (RO, 8-bit) */
[all …]
Dad7793.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2011-2012 Analog Devices Inc.
30 #define AD7793_REG_COMM 0 /* Communications Register (WO, 8-bit) */
31 #define AD7793_REG_STAT 0 /* Status Register (RO, 8-bit) */
32 #define AD7793_REG_MODE 1 /* Mode Register (RW, 16-bit */
33 #define AD7793_REG_CONF 2 /* Configuration Register (RW, 16-bit) */
34 #define AD7793_REG_DATA 3 /* Data Register (RO, 16-/24-bit) */
35 #define AD7793_REG_ID 4 /* ID Register (RO, 8-bit) */
36 #define AD7793_REG_IO 5 /* IO Register (RO, 8-bit) */
37 #define AD7793_REG_OFFSET 6 /* Offset Register (RW, 16-bit
[all …]
Dti_am335x_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
26 #include <linux/dma-mapping.h>
56 return readl(adc->mfd_tscadc->tscadc_base + reg); in tiadc_readl()
62 writel(val, adc->mfd_tscadc->tscadc_base + reg); in tiadc_writel()
69 step_en = ((1 << adc_dev->channels) - 1); in get_adc_step_mask()
70 step_en <<= TOTAL_STEPS - adc_dev->channels + 1; in get_adc_step_mask()
79 for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) { in get_adc_chan_step_mask()
80 if (chan->channel == adc_dev->channel_line[i]) { in get_adc_chan_step_mask()
83 step = adc_dev->channel_step[i]; in get_adc_chan_step_mask()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mp-dhcom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021-2022 Marek Vasut <marex@denx.de>
10 compatible = "dh,imx8mp-dhcom-som", "fsl,imx8mp";
22 /* Memory size 512 MiB..8 GiB will be filled by U-Boot */
26 reg_eth_vio: regulator-eth-vio {
27 compatible = "regulator-fixed";
29 regulator-always-on;
30 regulator-boot-on;
31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>;
[all …]
/linux-6.12.1/drivers/pinctrl/uniphier/
Dpinctrl-uniphier-ld20.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2016-2017 Socionext Inc.
12 #include "pinctrl-uniphier.h"
199 -1, UNIPHIER_PIN_DRV_FIXED4,
200 -1, UNIPHIER_PIN_PULL_NONE),
202 -1, UNIPHIER_PIN_DRV_FIXED4,
203 -1, UNIPHIER_PIN_PULL_NONE),
205 -1, UNIPHIER_PIN_DRV_FIXED4,
206 -1, UNIPHIER_PIN_PULL_NONE),
208 -1, UNIPHIER_PIN_DRV_FIXED4,
[all …]
Dpinctrl-uniphier-pxs2.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2015-2017 Socionext Inc.
12 #include "pinctrl-uniphier.h"
61 -1, UNIPHIER_PIN_DRV_FIXED8,
64 -1, UNIPHIER_PIN_DRV_FIXED8,
67 -1, UNIPHIER_PIN_DRV_FIXED8,
70 -1, UNIPHIER_PIN_DRV_FIXED8,
73 -1, UNIPHIER_PIN_DRV_FIXED8,
76 -1, UNIPHIER_PIN_DRV_FIXED8,
79 -1, UNIPHIER_PIN_DRV_FIXED8,
[all …]
/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp15x-mecio1-io.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include "stm32mp15-pinctrl.dtsi"
9 #include "stm32mp15xxaa-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
15 stdout-path = "serial0:1500000n8";
34 reserved-memory {
35 #address-cells = <1>;
36 #size-cells = <1>;
40 compatible = "shared-dma-pool";
[all …]
/linux-6.12.1/sound/pci/ice1712/
Dpsc724.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2012 Ondrej Zary <linux@rainbow-software.org>
34 * VT1722 (Envy24GT) - 6 outputs, 4 inputs (only 2 used), 24-bit/96kHz
42 * AC-Link configuration ICE_EEP2_ACLINK=0x80
60 * 2-channel DAC used for main output and stereo ADC (with 10-channel MUX)
61 * AIN1: LINE IN, AIN2: CD/VIDEO, AIN3: AUX, AIN4: Front MIC, AIN5: Rear MIC
63 * MODE (pin16) -- GND
64 * CE (pin17) -- GND I2C mode (address=0x34)
65 * DI (pin18) -- SDA (VT1722 pin70)
66 * CL (pin19) -- SCLK (VT1722 pin71)
[all …]
Dwm8776.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2012 Ondrej Zary <linux@rainbow-software.org>
16 /* low-level access */
24 wm->regs[addr] = data; in snd_wm8776_write()
25 wm->ops.write(wm, bus_addr, bus_data); in snd_wm8776_write()
28 /* register-level functions */
34 struct snd_card *card = wm->card; in snd_wm8776_activate_ctl()
42 index_offset = snd_ctl_get_ioff(kctl, &kctl->id); in snd_wm8776_activate_ctl()
43 vd = &kctl->vd[index_offset]; in snd_wm8776_activate_ctl()
45 vd->access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; in snd_wm8776_activate_ctl()
[all …]
/linux-6.12.1/drivers/staging/iio/addac/
Dadt7316.c1 // SPDX-License-Identifier: GPL-2.0+
177 * struct adt7316_chip_info - chip specific information
219 return sprintf(buf, "%d\n", !!(chip->config1 & ADT7316_EN)); in adt7316_show_enabled()
229 config1 = chip->config1 | ADT7316_EN; in _adt7316_store_enabled()
231 config1 = chip->config1 & ~ADT7316_EN; in _adt7316_store_enabled()
233 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG1, config1); in _adt7316_store_enabled()
235 return -EIO; in _adt7316_store_enabled()
237 chip->config1 = config1; in _adt7316_store_enabled()
257 return -EIO; in adt7316_store_enabled()
274 if ((chip->id & ID_FAMILY_MASK) != ID_ADT75XX) in adt7316_show_select_ex_temp()
[all …]

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